diff options
author | Vineel Kumar Reddy Kovvuri <vineelkumarr@nvidia.com> | 2013-09-27 07:38:17 -0400 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2015-03-18 15:06:43 -0400 |
commit | 1328ffb2e93f5f057e7a3dea3e3bdd68a5ff7aa5 (patch) | |
tree | aeb89104bdb1d288be1737a1df909b261131969d | |
parent | a5e63dd9f0e9333b96eaa28ec2fb1ed6de9226d3 (diff) |
video: tegra: dsi: Send panel commands from link 1
Fix panel commands not being sent from DSI link 1
Bug 1373421
Change-Id: I2e1301fbfee4d2958dae5291619dc3463fe9a25e
Signed-off-by: Vineel Kumar Reddy Kovvuri <vineelkumarr@nvidia.com>
Reviewed-on: http://git-master/r/299859
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
-rw-r--r-- | drivers/video/tegra/dc/dsi.c | 62 |
1 files changed, 35 insertions, 27 deletions
diff --git a/drivers/video/tegra/dc/dsi.c b/drivers/video/tegra/dc/dsi.c index 72b52dce4..9eca36525 100644 --- a/drivers/video/tegra/dc/dsi.c +++ b/drivers/video/tegra/dc/dsi.c | |||
@@ -559,7 +559,8 @@ static void __maybe_unused tegra_dsi_syncpt_reset( | |||
559 | udelay(300); | 559 | udelay(300); |
560 | } | 560 | } |
561 | 561 | ||
562 | static int __maybe_unused tegra_dsi_syncpt(struct tegra_dc_dsi_data *dsi) | 562 | static int __maybe_unused tegra_dsi_syncpt |
563 | (struct tegra_dc_dsi_data *dsi, u8 link_id) | ||
563 | { | 564 | { |
564 | u32 val; | 565 | u32 val; |
565 | int ret = 0; | 566 | int ret = 0; |
@@ -568,7 +569,7 @@ static int __maybe_unused tegra_dsi_syncpt(struct tegra_dc_dsi_data *dsi) | |||
568 | 569 | ||
569 | val = DSI_INCR_SYNCPT_COND(OP_DONE) | | 570 | val = DSI_INCR_SYNCPT_COND(OP_DONE) | |
570 | DSI_INCR_SYNCPT_INDX(dsi->syncpt_id); | 571 | DSI_INCR_SYNCPT_INDX(dsi->syncpt_id); |
571 | tegra_dsi_controller_writel(dsi, val, DSI_INCR_SYNCPT, 0); | 572 | tegra_dsi_controller_writel(dsi, val, DSI_INCR_SYNCPT, link_id); |
572 | 573 | ||
573 | ret = nvhost_syncpt_wait_timeout_ext(dsi->dc->ndev, dsi->syncpt_id, | 574 | ret = nvhost_syncpt_wait_timeout_ext(dsi->dc->ndev, dsi->syncpt_id, |
574 | dsi->syncpt_val + 1, (u32)MAX_SCHEDULE_TIMEOUT, NULL, NULL); | 575 | dsi->syncpt_val + 1, (u32)MAX_SCHEDULE_TIMEOUT, NULL, NULL); |
@@ -2733,14 +2734,15 @@ fail: | |||
2733 | return err; | 2734 | return err; |
2734 | } | 2735 | } |
2735 | 2736 | ||
2736 | static bool tegra_dsi_write_busy(struct tegra_dc_dsi_data *dsi) | 2737 | static bool tegra_dsi_write_busy(struct tegra_dc_dsi_data *dsi, u8 link_id) |
2737 | { | 2738 | { |
2738 | u32 timeout = 0; | 2739 | u32 timeout = 0; |
2739 | bool retVal = true; | 2740 | bool retVal = true; |
2740 | 2741 | ||
2741 | while (timeout <= DSI_MAX_COMMAND_DELAY_USEC) { | 2742 | while (timeout <= DSI_MAX_COMMAND_DELAY_USEC) { |
2742 | if (!(DSI_TRIGGER_HOST_TRIGGER(0x1) & | 2743 | if (!(DSI_TRIGGER_HOST_TRIGGER(0x1) & |
2743 | tegra_dsi_readl(dsi, DSI_TRIGGER))) { | 2744 | tegra_dsi_controller_readl(dsi, |
2745 | DSI_TRIGGER, link_id))) { | ||
2744 | retVal = false; | 2746 | retVal = false; |
2745 | break; | 2747 | break; |
2746 | } | 2748 | } |
@@ -2751,14 +2753,15 @@ static bool tegra_dsi_write_busy(struct tegra_dc_dsi_data *dsi) | |||
2751 | return retVal; | 2753 | return retVal; |
2752 | } | 2754 | } |
2753 | 2755 | ||
2754 | static bool tegra_dsi_read_busy(struct tegra_dc_dsi_data *dsi) | 2756 | static bool tegra_dsi_read_busy(struct tegra_dc_dsi_data *dsi, u8 link_id) |
2755 | { | 2757 | { |
2756 | u32 timeout = 0; | 2758 | u32 timeout = 0; |
2757 | bool retVal = true; | 2759 | bool retVal = true; |
2758 | 2760 | ||
2759 | while (timeout < DSI_STATUS_POLLING_DURATION_USEC) { | 2761 | while (timeout < DSI_STATUS_POLLING_DURATION_USEC) { |
2760 | if (!(DSI_HOST_DSI_CONTROL_IMM_BTA(0x1) & | 2762 | if (!(DSI_HOST_DSI_CONTROL_IMM_BTA(0x1) & |
2761 | tegra_dsi_readl(dsi, DSI_HOST_DSI_CONTROL))) { | 2763 | tegra_dsi_controller_readl(dsi, |
2764 | DSI_HOST_DSI_CONTROL, link_id))) { | ||
2762 | retVal = false; | 2765 | retVal = false; |
2763 | break; | 2766 | break; |
2764 | } | 2767 | } |
@@ -2769,18 +2772,18 @@ static bool tegra_dsi_read_busy(struct tegra_dc_dsi_data *dsi) | |||
2769 | return retVal; | 2772 | return retVal; |
2770 | } | 2773 | } |
2771 | 2774 | ||
2772 | static bool tegra_dsi_host_busy(struct tegra_dc_dsi_data *dsi) | 2775 | static bool tegra_dsi_host_busy(struct tegra_dc_dsi_data *dsi, u8 link_id) |
2773 | { | 2776 | { |
2774 | int err = 0; | 2777 | int err = 0; |
2775 | 2778 | ||
2776 | if (tegra_dsi_write_busy(dsi)) { | 2779 | if (tegra_dsi_write_busy(dsi, link_id)) { |
2777 | err = -EBUSY; | 2780 | err = -EBUSY; |
2778 | dev_err(&dsi->dc->ndev->dev, | 2781 | dev_err(&dsi->dc->ndev->dev, |
2779 | "DSI trigger bit already set\n"); | 2782 | "DSI trigger bit already set\n"); |
2780 | goto fail; | 2783 | goto fail; |
2781 | } | 2784 | } |
2782 | 2785 | ||
2783 | if (tegra_dsi_read_busy(dsi)) { | 2786 | if (tegra_dsi_read_busy(dsi, link_id)) { |
2784 | err = -EBUSY; | 2787 | err = -EBUSY; |
2785 | dev_err(&dsi->dc->ndev->dev, | 2788 | dev_err(&dsi->dc->ndev->dev, |
2786 | "DSI immediate bta bit already set\n"); | 2789 | "DSI immediate bta bit already set\n"); |
@@ -2855,6 +2858,7 @@ static struct dsi_status *tegra_dsi_prepare_host_transmission( | |||
2855 | struct tegra_dc_dsi_data *dsi, | 2858 | struct tegra_dc_dsi_data *dsi, |
2856 | u8 lp_op) | 2859 | u8 lp_op) |
2857 | { | 2860 | { |
2861 | int i = 0; | ||
2858 | int err = 0; | 2862 | int err = 0; |
2859 | struct dsi_status *init_status; | 2863 | struct dsi_status *init_status; |
2860 | bool restart_dc_stream = false; | 2864 | bool restart_dc_stream = false; |
@@ -2870,12 +2874,14 @@ static struct dsi_status *tegra_dsi_prepare_host_transmission( | |||
2870 | tegra_dsi_stop_dc_stream_at_frame_end(dc, dsi, 2); | 2874 | tegra_dsi_stop_dc_stream_at_frame_end(dc, dsi, 2); |
2871 | } | 2875 | } |
2872 | 2876 | ||
2873 | if (tegra_dsi_host_busy(dsi)) { | 2877 | for (i = 0; i < dsi->max_instances; i++) { |
2874 | tegra_dsi_soft_reset(dsi); | 2878 | if (tegra_dsi_host_busy(dsi, i)) { |
2875 | if (tegra_dsi_host_busy(dsi)) { | 2879 | tegra_dsi_soft_reset(dsi); |
2876 | err = -EBUSY; | 2880 | if (tegra_dsi_host_busy(dsi, i)) { |
2877 | dev_err(&dc->ndev->dev, "DSI host busy\n"); | 2881 | err = -EBUSY; |
2878 | goto fail; | 2882 | dev_err(&dc->ndev->dev, "DSI host busy\n"); |
2883 | goto fail; | ||
2884 | } | ||
2879 | } | 2885 | } |
2880 | } | 2886 | } |
2881 | 2887 | ||
@@ -2944,27 +2950,28 @@ fail: | |||
2944 | return err; | 2950 | return err; |
2945 | } | 2951 | } |
2946 | 2952 | ||
2947 | static int tegra_dsi_host_trigger(struct tegra_dc_dsi_data *dsi) | 2953 | static int tegra_dsi_host_trigger(struct tegra_dc_dsi_data *dsi, u8 link_id) |
2948 | { | 2954 | { |
2949 | int status = 0; | 2955 | int status = 0; |
2950 | 2956 | ||
2951 | if (tegra_dsi_readl(dsi, DSI_TRIGGER)) { | 2957 | if (tegra_dsi_controller_readl(dsi, DSI_TRIGGER, link_id)) { |
2952 | status = -EBUSY; | 2958 | status = -EBUSY; |
2953 | goto fail; | 2959 | goto fail; |
2954 | } | 2960 | } |
2955 | 2961 | ||
2956 | tegra_dsi_controller_writel(dsi, | 2962 | tegra_dsi_controller_writel(dsi, |
2957 | DSI_TRIGGER_HOST_TRIGGER(TEGRA_DSI_ENABLE), DSI_TRIGGER, 0); | 2963 | DSI_TRIGGER_HOST_TRIGGER(TEGRA_DSI_ENABLE), |
2964 | DSI_TRIGGER, link_id); | ||
2958 | 2965 | ||
2959 | if (!tegra_cpu_is_asim() && DSI_USE_SYNC_POINTS) { | 2966 | if (!tegra_cpu_is_asim() && DSI_USE_SYNC_POINTS) { |
2960 | status = tegra_dsi_syncpt(dsi); | 2967 | status = tegra_dsi_syncpt(dsi, link_id); |
2961 | if (status < 0) { | 2968 | if (status < 0) { |
2962 | dev_err(&dsi->dc->ndev->dev, | 2969 | dev_err(&dsi->dc->ndev->dev, |
2963 | "DSI syncpt for host trigger failed\n"); | 2970 | "DSI syncpt for host trigger failed\n"); |
2964 | goto fail; | 2971 | goto fail; |
2965 | } | 2972 | } |
2966 | } else { | 2973 | } else { |
2967 | if (tegra_dsi_write_busy(dsi)) { | 2974 | if (tegra_dsi_write_busy(dsi, link_id)) { |
2968 | status = -EBUSY; | 2975 | status = -EBUSY; |
2969 | dev_err(&dsi->dc->ndev->dev, | 2976 | dev_err(&dsi->dc->ndev->dev, |
2970 | "Timeout waiting on write completion\n"); | 2977 | "Timeout waiting on write completion\n"); |
@@ -3018,7 +3025,7 @@ static int _tegra_dsi_write_data(struct tegra_dc_dsi_data *dsi, | |||
3018 | } | 3025 | } |
3019 | } | 3026 | } |
3020 | 3027 | ||
3021 | err = tegra_dsi_host_trigger(dsi); | 3028 | err = tegra_dsi_host_trigger(dsi, cmd->link_id); |
3022 | if (err < 0) | 3029 | if (err < 0) |
3023 | dev_err(&dsi->dc->ndev->dev, "DSI host trigger failed\n"); | 3030 | dev_err(&dsi->dc->ndev->dev, "DSI host trigger failed\n"); |
3024 | 3031 | ||
@@ -3329,16 +3336,17 @@ static int tegra_dsi_bta(struct tegra_dc_dsi_data *dsi) | |||
3329 | 3336 | ||
3330 | val = tegra_dsi_readl(dsi, DSI_HOST_DSI_CONTROL); | 3337 | val = tegra_dsi_readl(dsi, DSI_HOST_DSI_CONTROL); |
3331 | val |= DSI_HOST_DSI_CONTROL_IMM_BTA(TEGRA_DSI_ENABLE); | 3338 | val |= DSI_HOST_DSI_CONTROL_IMM_BTA(TEGRA_DSI_ENABLE); |
3332 | tegra_dsi_controller_writel(dsi, val, DSI_HOST_DSI_CONTROL, 0); | 3339 | tegra_dsi_controller_writel(dsi, val, |
3340 | DSI_HOST_DSI_CONTROL, TEGRA_DSI_LINK0); | ||
3333 | 3341 | ||
3334 | if (!tegra_cpu_is_asim() && DSI_USE_SYNC_POINTS) { | 3342 | if (!tegra_cpu_is_asim() && DSI_USE_SYNC_POINTS) { |
3335 | err = tegra_dsi_syncpt(dsi); | 3343 | err = tegra_dsi_syncpt(dsi, TEGRA_DSI_LINK0); |
3336 | if (err < 0) { | 3344 | if (err < 0) { |
3337 | dev_err(&dsi->dc->ndev->dev, | 3345 | dev_err(&dsi->dc->ndev->dev, |
3338 | "DSI syncpt for bta failed\n"); | 3346 | "DSI syncpt for bta failed\n"); |
3339 | } | 3347 | } |
3340 | } else { | 3348 | } else { |
3341 | if (tegra_dsi_read_busy(dsi)) { | 3349 | if (tegra_dsi_read_busy(dsi, TEGRA_DSI_LINK0)) { |
3342 | err = -EBUSY; | 3350 | err = -EBUSY; |
3343 | dev_err(&dsi->dc->ndev->dev, | 3351 | dev_err(&dsi->dc->ndev->dev, |
3344 | "Timeout wating on read completion\n"); | 3352 | "Timeout wating on read completion\n"); |
@@ -3571,7 +3579,7 @@ int tegra_dsi_panel_sanity_check(struct tegra_dc *dc, | |||
3571 | tegra_dsi_lp_clk_enable(dsi); | 3579 | tegra_dsi_lp_clk_enable(dsi); |
3572 | 3580 | ||
3573 | init_status = tegra_dsi_prepare_host_transmission( | 3581 | init_status = tegra_dsi_prepare_host_transmission( |
3574 | dc, dsi, DSI_LP_OP_WRITE); | 3582 | dc, dsi, DSI_LP_OP_WRITE); |
3575 | if (IS_ERR_OR_NULL(init_status)) { | 3583 | if (IS_ERR_OR_NULL(init_status)) { |
3576 | err = PTR_ERR(init_status); | 3584 | err = PTR_ERR(init_status); |
3577 | dev_err(&dc->ndev->dev, "DSI host config failed\n"); | 3585 | dev_err(&dc->ndev->dev, "DSI host config failed\n"); |
@@ -3642,7 +3650,7 @@ static int tegra_dsi_enter_ulpm(struct tegra_dc_dsi_data *dsi) | |||
3642 | tegra_dsi_writel(dsi, val, DSI_HOST_DSI_CONTROL); | 3650 | tegra_dsi_writel(dsi, val, DSI_HOST_DSI_CONTROL); |
3643 | 3651 | ||
3644 | if (!tegra_cpu_is_asim() && DSI_USE_SYNC_POINTS) { | 3652 | if (!tegra_cpu_is_asim() && DSI_USE_SYNC_POINTS) { |
3645 | ret = tegra_dsi_syncpt(dsi); | 3653 | ret = tegra_dsi_syncpt(dsi, TEGRA_DSI_LINK0); |
3646 | if (ret < 0) { | 3654 | if (ret < 0) { |
3647 | dev_err(&dsi->dc->ndev->dev, | 3655 | dev_err(&dsi->dc->ndev->dev, |
3648 | "DSI syncpt for ulpm enter failed\n"); | 3656 | "DSI syncpt for ulpm enter failed\n"); |
@@ -3672,7 +3680,7 @@ static int tegra_dsi_exit_ulpm(struct tegra_dc_dsi_data *dsi) | |||
3672 | tegra_dsi_writel(dsi, val, DSI_HOST_DSI_CONTROL); | 3680 | tegra_dsi_writel(dsi, val, DSI_HOST_DSI_CONTROL); |
3673 | 3681 | ||
3674 | if (!tegra_cpu_is_asim() && DSI_USE_SYNC_POINTS) { | 3682 | if (!tegra_cpu_is_asim() && DSI_USE_SYNC_POINTS) { |
3675 | ret = tegra_dsi_syncpt(dsi); | 3683 | ret = tegra_dsi_syncpt(dsi, TEGRA_DSI_LINK0); |
3676 | if (ret < 0) { | 3684 | if (ret < 0) { |
3677 | dev_err(&dsi->dc->ndev->dev, | 3685 | dev_err(&dsi->dc->ndev->dev, |
3678 | "DSI syncpt for ulpm exit failed\n"); | 3686 | "DSI syncpt for ulpm exit failed\n"); |