<feed xmlns='http://www.w3.org/2005/Atom'>
<title>nvidia-tegra-modules.git/include/linux/tegra-roc.h, branch rtss22-ae</title>
<subtitle>NVIDIA's kernel modules to support tegra chips (used in Jetson boards)</subtitle>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvidia-tegra-modules.git/'/>
<entry>
<title>platform: tegra: Add ROC flush support</title>
<updated>2015-06-04T21:11:12+00:00</updated>
<author>
<name>Peng Du</name>
<email>pdu@nvidia.com</email>
</author>
<published>2015-03-25T18:20:27+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvidia-tegra-modules.git/commit/?id=6f188e7d85b9c58512c42892f5683eb9e38dbeea'/>
<id>6f188e7d85b9c58512c42892f5683eb9e38dbeea</id>
<content type='text'>
For large DMA transfer from/to non IO coherent devices, entire CCPLEX
must be flushed to ensure coherency. This change adds the support by
requesting ROC flush operation via CREG mapped into ARI space.

Change-Id: Icbf80648a60cd15b7de745f476d45551952eee73
Signed-off-by: Peng Du &lt;pdu@nvidia.com&gt;
Reviewed-on: http://git-master/r/716542
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy &lt;vdumpa@nvidia.com&gt;
Reviewed-by: Alexander Van Brunt &lt;avanbrunt@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
For large DMA transfer from/to non IO coherent devices, entire CCPLEX
must be flushed to ensure coherency. This change adds the support by
requesting ROC flush operation via CREG mapped into ARI space.

Change-Id: Icbf80648a60cd15b7de745f476d45551952eee73
Signed-off-by: Peng Du &lt;pdu@nvidia.com&gt;
Reviewed-on: http://git-master/r/716542
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy &lt;vdumpa@nvidia.com&gt;
Reviewed-by: Alexander Van Brunt &lt;avanbrunt@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
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