nvidia-tegra-modules.git/include/linux/platform/tegra/tegra_cbb.h, branch rtss22-ae NVIDIA's kernel modules to support tegra chips (used in Jetson boards) platform: tegra: cbb: mask SError due to CBB error 2020-12-14T12:54:09+00:00 Sumit Gupta sumitg@nvidia.com 2020-07-21T19:03:06+00:00 af707d09befb567b124be1d440feadfa41149bc5 Mask SError for illegal accesses from CCPLEX master. Interrupts will be generated for access from CCPLEX and error info will be printed within the interrupt handler instead of SError callback. Also, call BUG() to crash the system if illegal access is from CCPLEX master. For illegal accesses from other masters, interrupt is already getting generated instead of SError. Bug 3191922 Change-Id: Ie03f4f0f0ca58fb695a54183456861dd98931855 Signed-off-by: Sumit Gupta <sumitg@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2118672 (cherry picked from commit ef8df45ba078e6d9ab2d648c4c122e38b600c77d) Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2458251 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
Mask SError for illegal accesses from CCPLEX master.
Interrupts will be generated for access from CCPLEX and
error info will be printed within the interrupt handler
instead of SError callback. Also, call BUG() to crash
the system if illegal access is from CCPLEX master.
For illegal accesses from other masters, interrupt is
already getting generated instead of SError.

Bug 3191922

Change-Id: Ie03f4f0f0ca58fb695a54183456861dd98931855
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2118672
(cherry picked from commit ef8df45ba078e6d9ab2d648c4c122e38b600c77d)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2458251
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
platform: tegra: parse userbits for cluster NOC's 2018-09-14T22:34:29+00:00 sumitg sumitg@nvidia.com 2018-09-12T11:00:27+00:00 3ca32bf749eef2c338d9f8707001ca883e9933e8 Parse failed transaction's userbits separately for Cluster Fabric NOC's from CBB central NOC's. Bug 200340783 Change-Id: I8d635b5a28b3e15e6a86978b2dc8325e131f476d Signed-off-by: sumitg <sumitg@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1821397 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
Parse failed transaction's userbits separately for
Cluster Fabric NOC's from CBB central NOC's.

Bug 200340783

Change-Id: I8d635b5a28b3e15e6a86978b2dc8325e131f476d
Signed-off-by: sumitg <sumitg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1821397
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
platform: tegra: cast removes address space of expression 2018-09-06T04:11:52+00:00 Ajay Nandakumar anandakumarm@nvidia.com 2018-08-30T10:38:26+00:00 21591d034305c466fbd674676588531a0d787f92 Fixing the sparce warning, which results as result of casting a void * iomem to u64. Although the data sizes are same, moving the u64 data type to void * iomem. Bug 200434802 Change-Id: I9821decc620e69f0ac752f7d0be3ac9b10e074f7 Signed-off-by: Ajay Nandakumar <anandakumarm@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1809907 GVS: Gerrit_Virtual_Submit Reviewed-by: Sachin Nikam <snikam@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
Fixing the sparce warning, which results as result of casting a
void * iomem to u64. Although the data sizes are same, moving the
u64 data type to void * iomem.

Bug 200434802

Change-Id: I9821decc620e69f0ac752f7d0be3ac9b10e074f7
Signed-off-by: Ajay Nandakumar <anandakumarm@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1809907
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
platform: tegra: check clock enabled before register access 2018-08-09T23:29:49+00:00 Sumit Gupta sumitg@nvidia.com 2018-08-08T06:43:06+00:00 dd01cccb50c493c38ac1ce35cd5612c83f1f9b77 Adding check for clock enabled by calling __clk_is_enabled() before accessing registers for CV-NOC. This was causing additional CBB errors on reading error valid register of CV-NOC while reporting original SError cause due to any illegal access in other cluster NOC's. Bug 200340783 Change-Id: I819f99264c4e934e6ae0facf39d35fed15e79957 Signed-off-by: Sumit Gupta <sumitg@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1794891 GVS: Gerrit_Virtual_Submit Reviewed-by: Puneet Saxena <puneets@nvidia.com> Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
Adding check for clock enabled by calling __clk_is_enabled()
before accessing registers for CV-NOC.
This was causing additional CBB errors on reading error valid
register of CV-NOC while reporting original SError cause due
to any illegal access in other cluster NOC's.

Bug 200340783

Change-Id: I819f99264c4e934e6ae0facf39d35fed15e79957
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1794891
GVS: Gerrit_Virtual_Submit
Reviewed-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
platform: tegra: add cbb noirq resume callback 2018-08-02T20:56:00+00:00 Sumit Gupta sumitg@nvidia.com 2018-07-06T13:41:31+00:00 4b68191a08a3bb923f9a15df9db5dfb653b0343b Adding noirq phase callback in cbb to enable faults during resume. Also added no rumtime pm functions in cvsram driver to enable/disable CV clock before setting its NOC's registers in cbb resume/suspend noirq. This was required as the existing runtime pm used in cvnas driver is not up during noirq phase. Bug 200422155 Bug 200340783 Change-Id: I6ca19eec2bcad3254508c594a6d4e96e063c2cd0 Signed-off-by: Sumit Gupta <sumitg@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1772791 GVS: Gerrit_Virtual_Submit Reviewed-by: Puneet Saxena <puneets@nvidia.com> Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
Adding noirq phase callback in cbb to enable faults during resume.
Also added no rumtime pm functions in cvsram driver to enable/disable
CV clock before setting its NOC's registers in cbb resume/suspend
noirq. This was required as the existing runtime pm used in cvnas
driver is not up during noirq phase.

Bug 200422155
Bug 200340783

Change-Id: I6ca19eec2bcad3254508c594a6d4e96e063c2cd0
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1772791
GVS: Gerrit_Virtual_Submit
Reviewed-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
tegra: tegra: add support for CV NOC errors 2018-06-26T23:33:15+00:00 Sumit Gupta sumitg@nvidia.com 2018-03-19T19:03:07+00:00 8835b72ded37eb90a779b89f931eb69aaa21add3 adding support to handle errors from CV NOC. Enabling clock and using PROBE_DEFER for NOC's which are not probed yet e.g: CV-NOC here as it depends on cvnas driver which gets probed later. Bug 200340783 Bug 200389874 Change-Id: I2608aff0956a67f15426773c6ae0d471e5f645eb Signed-off-by: Sumit Gupta <sumitg@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1678123 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
adding support to handle errors from CV NOC.
Enabling clock and using PROBE_DEFER for NOC's
which are not probed yet e.g: CV-NOC here as it
depends on cvnas driver which gets probed later.

Bug 200340783
Bug 200389874

Change-Id: I2608aff0956a67f15426773c6ae0d471e5f645eb
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1678123
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
tegra: t19x: correct compatible string for NOC's 2018-05-30T12:32:56+00:00 Sumit Gupta sumitg@nvidia.com 2018-04-02T11:34:55+00:00 fa24a82867d9bab8cc5c9f942acb5a15063bb3ad Correcting compatible string name from bridge to NOC. Also, adding is_ax2apb_bridge_connected flag to check if the cluster is connected to CBB through any AXI2APB bridge. Currently, AON cluster is only one which is not connected. So, no need to read AXI2APB bridge registers for that NOC. Bug 200340783 Change-Id: Iea89b6a3daff1dd30b6d43a9e8254ed362a841d0 Signed-off-by: Sumit Gupta <sumitg@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1686705 GVS: Gerrit_Virtual_Submit Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
Correcting compatible string name from bridge to NOC.
Also, adding is_ax2apb_bridge_connected flag to check if
the cluster is connected to CBB through any AXI2APB bridge.
Currently, AON cluster is only one which is not connected.
So, no need to read AXI2APB bridge registers for that NOC.

Bug 200340783

Change-Id: Iea89b6a3daff1dd30b6d43a9e8254ed362a841d0
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1686705
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
tegra: t19x: add lookup tables for each NOC 2018-03-19T05:43:45+00:00 Sumit Gupta sumitg@nvidia.com 2018-03-15T11:27:41+00:00 fdb9409672d4b3cac58c983402fadd198339014c Changes to add separate lookup table for each NOC and adding lookup tables for NOC's(AON-NOC, BPMP-NOC, RCE-NOC, SCE-NOC). Earlier CBB_Central_NOC(CBB-NOC) lookup table was used for all NOC's which was resulting in wrong initflow and targflow for errors from NOC's other than CBB central NOC. Also doing some cleanup of driver code. Bug 200340783 Bug 200389874 Change-Id: I53ce9647dd2a7b608e17b9707cac9d8ac8e479a0 Signed-off-by: Sumit Gupta <sumitg@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1676664 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Rohit Khanna <rokhanna@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
Changes to add separate lookup table for each NOC and adding
lookup tables for NOC's(AON-NOC, BPMP-NOC, RCE-NOC, SCE-NOC).
Earlier CBB_Central_NOC(CBB-NOC) lookup table was used for all
NOC's which was resulting in wrong initflow and targflow for
errors from NOC's other than CBB central NOC. Also doing some
cleanup of driver code.

Bug 200340783
Bug 200389874

Change-Id: I53ce9647dd2a7b608e17b9707cac9d8ac8e479a0
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1676664
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Rohit Khanna <rokhanna@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
tegra: t19x: support for AXI2APB slave error cause 2018-03-07T17:44:28+00:00 Sumit Gupta sumitg@nvidia.com 2018-01-25T08:03:48+00:00 b0eb437b59c958af498391a98f964fc2c4f0b318 adding support to get error cause for APB slaves as their errors are logged in error loggers but implemented in APB domain. Bug 200340783 Change-Id: Ic09028838cf15c472dc41e1c0b6704caec01b901 Signed-off-by: Sumit Gupta <sumitg@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1645853 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Rohit Khanna <rokhanna@nvidia.com> Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
adding support to get error cause for APB slaves as their errors
are logged in error loggers but implemented in APB domain.

Bug 200340783

Change-Id: Ic09028838cf15c472dc41e1c0b6704caec01b901
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1645853
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Rohit Khanna <rokhanna@nvidia.com>
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
tegra: t19x: add handler for cbb errors from other masters 2017-12-05T17:13:14+00:00 Sumit Gupta sumitg@nvidia.com 2017-11-28T13:12:23+00:00 772332764457e2b186a36fb66b7cdbb56925ce7f adding interrupt handler for CBB errors due to illegal access by masters other than CCPLEX. In handler, printing info about errored transaction from CBB's error logger registers. CBB Errors from other masters are routed over two IRQ lines: - cbb_secure_intr: SEC(system firewall) & SLV errors. - cbb_nonsecure_intr: TMO & DEC errors. For illegal accesses due to CCPLEX only, SError(inband error notification) is used which is already handled in driver. Bug 200340783 Change-Id: Id530d5aeda580a415d01422d66ef922f0d8645d7 Signed-off-by: Sumit Gupta <sumitg@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1606341 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Rohit Khanna <rokhanna@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
adding interrupt handler for CBB errors due to illegal access
by masters other than CCPLEX. In handler, printing info about
errored transaction from CBB's error logger registers.
CBB Errors from other masters are routed over two IRQ lines:
 - cbb_secure_intr: SEC(system firewall) & SLV errors.
 - cbb_nonsecure_intr: TMO & DEC errors.

For illegal accesses due to CCPLEX only, SError(inband error notification)
is used which is already handled in driver.

Bug 200340783

Change-Id: Id530d5aeda580a415d01422d66ef922f0d8645d7
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1606341
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Rohit Khanna <rokhanna@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>