nvidia-tegra-modules.git/include/linux/platform/tegra/tegra-nvlink.h, branch rtss22-ae NVIDIA's kernel modules to support tegra chips (used in Jetson boards) nvlink: Disable 1/8th mode for all t19x topologies 2018-08-30T05:39:44+00:00 Petlozu Pravareshwar petlozup@nvidia.com 2018-08-23T08:27:29+00:00 bb273a3ce0cfdbec3ff447040a2982eff468eafa Disable single-lane(1/8th) mode for all the t19x nvlink topologies. Also make sure we enable single-lane mode on nvlink only when both of the devices connected on either side of the link supports single lane mode. Bug 2341788 Change-Id: I95eae827cc6a3b748dd91637cdef27509a840c87 Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1805191 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
Disable single-lane(1/8th) mode for all the t19x nvlink topologies.
Also make sure we enable single-lane mode on nvlink only when
both of the devices connected on either side of the link supports
single lane mode.

Bug 2341788

Change-Id: I95eae827cc6a3b748dd91637cdef27509a840c87
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1805191
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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nvlink: t19x: Remove 25GBPS speed support 2018-07-19T07:06:32+00:00 Seema Khowala seemaj@nvidia.com 2018-07-10T20:29:14+00:00 6dc5939fc78a55caddc5bfca756ee0c2d35d3208 Based on A01 Silicon Characterization, we cannot meet Nvlink POR speeds of 25G across 100% bin and hence 25GBPS is defeatured. Bug 200425755 Bug 2083356 Change-Id: Ia2166370413571787040e57ade299e3c136f4d5e Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1775462 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
Based on A01 Silicon Characterization, we cannot meet Nvlink POR speeds
of 25G across 100% bin and hence 25GBPS is defeatured.

Bug 200425755
Bug 2083356

Change-Id: Ia2166370413571787040e57ade299e3c136f4d5e
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1775462
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
nvlink: add support for kernel tests 2018-06-20T01:23:10+00:00 Adeel Raza araza@nvidia.com 2018-04-27T21:45:08+00:00 c484fb35bf3edee3b12dc41dbbe49fff0e24c2c5 Add support for NVLINK kernel test modules: - Create an NVLINK tests debugfs directory which will be used as the parent directory for all test related debugfs nodes - Export NVLINK logging APIs - Rename the NVLINK_DRV_NAME macros to NVLINK_MODULE_NAME. This was done because now the NVLINK logging APIs are being used by non-driver modules (i.e. tests) as well. - Export an ARM64 cache flush API - this API is needed by the Tegra loopback test Bug 2133882 Jira NVLINK-107 Change-Id: I587b704ff44327ee4d9767156cb87cbe27408e08 Signed-off-by: Adeel Raza <araza@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1704230 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Petlozu Pravareshwar <petlozup@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
Add support for NVLINK kernel test modules:
   - Create an NVLINK tests debugfs directory which will be used as the
     parent directory for all test related debugfs nodes
   - Export NVLINK logging APIs
        - Rename the NVLINK_DRV_NAME macros to NVLINK_MODULE_NAME. This
          was done because now the NVLINK logging APIs are being used by
          non-driver modules (i.e. tests) as well.
   - Export an ARM64 cache flush API - this API is needed by the Tegra
     loopback test

Bug 2133882
Jira NVLINK-107

Change-Id: I587b704ff44327ee4d9767156cb87cbe27408e08
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1704230
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Petlozu Pravareshwar <petlozup@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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nvlink: add shim driver shutdown IOCTLs 2018-06-07T18:12:53+00:00 Adeel Raza araza@nvidia.com 2018-05-11T21:05:58+00:00 8af4db8e8ef8f67bc4757c54425f24511721be63 For the shim driver mode, RM needs to perform a graceful shutdown of NVLINK during RM unload. Export the following T19x NVLINK endpoint IOCTLs for shim driver NVLINK shutdown: - INTERFACE_DISABLE IOCTL: Disables the NVLINK aperture - FINALIZE_SHUTDOWN IOCTL: Does shutdown related SW cleanup Bug 2113729 Jira NVLINK-173 Change-Id: I60e3f5fffd0b1e6cc87476b047ef1b761b5174d1 Signed-off-by: Adeel Raza <araza@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1714177 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Petlozu Pravareshwar <petlozup@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
For the shim driver mode, RM needs to perform a graceful shutdown of
NVLINK during RM unload. Export the following T19x NVLINK endpoint
IOCTLs for shim driver NVLINK shutdown:
   - INTERFACE_DISABLE IOCTL: Disables the NVLINK aperture
   - FINALIZE_SHUTDOWN IOCTL: Does shutdown related SW cleanup

Bug 2113729
Jira NVLINK-173

Change-Id: I60e3f5fffd0b1e6cc87476b047ef1b761b5174d1
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1714177
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Petlozu Pravareshwar <petlozup@nvidia.com>
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nvlink: export MINION fields 2018-05-16T21:33:57+00:00 Adeel Raza araza@nvidia.com 2018-05-10T02:09:24+00:00 cc80749097ce94c6a3a947f40c9d68686adc8b66 Move MINION related fields from the T19x NVLINK endpoint's header file to the common NVLINK driver stack header file. This is needed because going forward all NVLINK endpoint drivers will use the same MINION ucode format. Bug 2113404 Change-Id: I8fc332fde3eac835694f2a270ca91223b8556a5b Signed-off-by: Adeel Raza <araza@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1711612 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
Move MINION related fields from the T19x NVLINK endpoint's header file
to the common NVLINK driver stack header file. This is needed because
going forward all NVLINK endpoint drivers will use the same MINION ucode
format.

Bug 2113404

Change-Id: I8fc332fde3eac835694f2a270ca91223b8556a5b
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1711612
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
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nvlink: Implement nvlink shutdown during SC0/SC7 2018-05-11T13:58:02+00:00 Suresh Mangipudi smangipudi@nvidia.com 2018-02-20T12:00:45+00:00 f62a90bb79f4dc2f5385d9913a0dea74cb83bf01 This change implements below nvlink shutdown steps: * Ensure nvlink is idle and no pending transactions * Turn off MSS Nvlink slave aperture * Turn off MSS Nvlink core clocks * Transition the link to SWCFG * Transition the link to OFF * Assert t19x nvlink resets and disable the clks Also this change adds "shutdown" debugfs node that can be used to shutdown t19x nvlink. Bug 200402583 Bug 200389569 Change-Id: I7312f3c49ed643a66325b9280b392394008276d4 Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1661191 Reviewed-by: Petlozu Pravareshwar <petlozup@nvidia.com> Tested-by: Petlozu Pravareshwar <petlozup@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Tejal Kudav <tkudav@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
This change implements below nvlink shutdown steps:
* Ensure nvlink is idle and no pending transactions
* Turn off MSS Nvlink slave aperture
* Turn off MSS Nvlink core clocks
* Transition the link to SWCFG
* Transition the link to OFF
* Assert t19x nvlink resets and disable the clks

Also this change adds "shutdown" debugfs node that can
be used to shutdown t19x nvlink.

Bug 200402583
Bug 200389569

Change-Id: I7312f3c49ed643a66325b9280b392394008276d4
Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1661191
Reviewed-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Tested-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Tejal Kudav <tkudav@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
nvlink: Add support for 16G nvlink speed 2018-05-07T17:33:43+00:00 Petlozu Pravareshwar petlozup@nvidia.com 2018-04-19T07:51:02+00:00 ea2f6c0223aeb78b5899f72bdeb623ebcf2e9b06 This change adds support for 16G nvlink speed. For this purpose, INITPLL8 MINION DL command is used for 156MHz refclk rate config and INITPLL9 MINION DL command is used for 150MHz refclk rate config. Bug 2101745 Change-Id: Iccad4aba2602db6ab188f475d3ff57cf9cf4f500 Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1698352 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Adeel Raza <araza@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
This change adds support for 16G nvlink speed. For this purpose,
INITPLL8 MINION DL command is used for 156MHz refclk rate config and
INITPLL9 MINION DL command is used for 150MHz refclk rate config.

Bug 2101745

Change-Id: Iccad4aba2602db6ab188f475d3ff57cf9cf4f500
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1698352
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
nvlink: add RM shim driver support 2018-04-23T17:03:45+00:00 Adeel Raza araza@nvidia.com 2018-02-11T08:28:37+00:00 6834b184688ff78118ca60ffd23a100a1150e785 Add support in the Tegra NVLINK endpoint driver for interfacing with the RM shim driver. Interfacing with RM is necessary in order to enable GPU MODS NVLINK testing of Tegra+dGPU topologies. Jira NVLINK-147 Bug 2090322 Change-Id: I75e23df7293ce0c9157152a7035372d2e080ef41 Signed-off-by: Adeel Raza <araza@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1696116 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Tejal Kudav <tkudav@nvidia.com> Reviewed-by: Petlozu Pravareshwar <petlozup@nvidia.com> Tested-by: Petlozu Pravareshwar <petlozup@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
Add support in the Tegra NVLINK endpoint driver for interfacing with the
RM shim driver. Interfacing with RM is necessary in order to enable GPU
MODS NVLINK testing of Tegra+dGPU topologies.

Jira NVLINK-147
Bug 2090322

Change-Id: I75e23df7293ce0c9157152a7035372d2e080ef41
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1696116
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Tested-by: Petlozu Pravareshwar <petlozup@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
nvlink: fix TX clock model 2018-02-07T05:22:14+00:00 Adeel Raza araza@nvidia.com 2018-01-31T00:21:21+00:00 666dd3976b2f86d0d28834a3abe5ef2e8be24f42 Initially BPMP modeled NVLINK TX clock source mux as clock gate TEGRA194_CLK_NVLINK_TXCLK_CTRL. This allowed NVLINK driver to just enable TEGRA194_CLK_NVLINK_TXCLK_CTRL when it needed to switch to PLL source, and disable TEGRA194_CLK_NVLINK_TXCLK_CTRL in order to switch back to clk_m/oscillator source. This model is incorrect (gate instated of mux). It doesn’t allow proper voltage scaling for NVLINK clock, and it is not consistent with NVLINK clock monitoring. The NVLINK clock model is now fixed in BPMP. The following changes have been made to the NVLINK kernel driver in order to comply with the new clock model: 1. call clk_set_rate() on TEGRA194_CLK_NVLINK_PLL_TXCLK after INITPLL/XAVIER_CALIBRATEPLL DLCMDs 2. Instead of enabling/disabling TEGRA194_CLK_NVLINK_TXCLK_CTRL, the NVLINK driver calls clk_set_parent() on TEGRA194_CLK_NVLINK_TX clock Bug 2048310 Change-Id: I55c23a0b8f07335b8e331442a208288260a8953d Signed-off-by: Adeel Raza <araza@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1649119 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
Initially BPMP modeled NVLINK TX clock source mux as clock gate
TEGRA194_CLK_NVLINK_TXCLK_CTRL. This allowed NVLINK driver to just
enable TEGRA194_CLK_NVLINK_TXCLK_CTRL when it needed to switch to PLL
source, and disable TEGRA194_CLK_NVLINK_TXCLK_CTRL in order to switch
back to clk_m/oscillator source. This model is incorrect (gate instated
of mux). It doesn’t allow proper voltage scaling for NVLINK clock, and
it is not consistent with NVLINK clock monitoring.

The NVLINK clock model is now fixed in BPMP. The following changes have
been made to the NVLINK kernel driver in order to comply with the new
clock model:
   1. call clk_set_rate() on TEGRA194_CLK_NVLINK_PLL_TXCLK after
      INITPLL/XAVIER_CALIBRATEPLL DLCMDs
   2. Instead of enabling/disabling TEGRA194_CLK_NVLINK_TXCLK_CTRL, the
      NVLINK driver calls clk_set_parent() on TEGRA194_CLK_NVLINK_TX
      clock

Bug 2048310

Change-Id: I55c23a0b8f07335b8e331442a208288260a8953d
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1649119
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
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nvlink: Cleanup core driver interface 2018-02-02T07:23:40+00:00 Tejal Kudav tkudav@nvidia.com 2018-01-16T16:27:25+00:00 aa7772597ad7b91a4338ffcd7d2c01d1f214c1a6 The device and link struct shared between core driver and endpoint contains hardware register base addresses, fields to log interrupts and more, which are not required to be shared with core driver. Move these fields to endpoint driver's private structure. JIRA NVLINK-139 Change-Id: I138364de025ef243b7b3a4c7c4a86089b890a3f9 Signed-off-by: Tejal Kudav <tkudav@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1640796 GVS: Gerrit_Virtual_Submit Reviewed-by: Adeel Raza <araza@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
The device and link struct shared between core driver and
endpoint contains hardware register base addresses, fields
to log interrupts and more, which are not required to be shared with
core driver. Move these fields to endpoint driver's private structure.

JIRA NVLINK-139

Change-Id: I138364de025ef243b7b3a4c7c4a86089b890a3f9
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1640796
GVS: Gerrit_Virtual_Submit
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>