nvidia-tegra-modules.git/include/linux/nvhost.h, branch rtss22-ae NVIDIA's kernel modules to support tegra chips (used in Jetson boards) video: tegra: host: LS fw gets priority in get fw 2021-08-02T20:24:39+00:00 Ankit Patel anpatel@nvidia.com 2020-07-14T17:51:56+00:00 3e54f17ed2cdf0495c727077436dde94d0314c2f Whenever NVDEC LS firmware pack for the soc, It will give priority to LS FW rather than NS FW. If in case of absence of LS FW It will load NS FW. Bug 200415909 Bug 200704321 Signed-off-by: Ankit Patel <anpatel@nvidia.com> Change-Id: I15f53f33d4735c25b972e1e8a394d01047f86bde Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2375549 Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2511966 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> 
Whenever NVDEC LS firmware pack for the soc, It will give priority to LS
FW rather than NS FW. If in case of absence of LS FW It will load NS FW.

Bug 200415909
Bug 200704321

Signed-off-by: Ankit Patel <anpatel@nvidia.com>
Change-Id: I15f53f33d4735c25b972e1e8a394d01047f86bde
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2375549
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2511966
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
video: tegra: host: add freq. capping capability 2020-02-07T19:23:55+00:00 Leon Yu leoyu@nvidia.com 2020-01-30T06:31:03+00:00 143272e44dc2ddbd8115b4b6c951ae88adb5a17c This change adds sysfs interface under acm for capping frequencies of host1x clients. It is to replace existing nvpmodel kernel driver which serves same purpose but does this in an unreliable/wrong way - bypassing host1x and grabbing parent clock handle of clients directly. With this functionality, things are put under host1x acm control and we gain more finely grained control in some cases, e.g. setting freq. cap independently for dla0 and dla1. Bug 200585348 Bug 200521935 Change-Id: I34445df1abc3656138cfde06c23ea5a4c8694d07 Signed-off-by: Leon Yu <leoyu@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2288876 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit 
This change adds sysfs interface under acm for capping frequencies of
host1x clients. It is to replace existing nvpmodel kernel driver which
serves same purpose but does this in an unreliable/wrong way -
bypassing host1x and grabbing parent clock handle of clients directly.

With this functionality, things are put under host1x acm control and
we gain more finely grained control in some cases, e.g. setting freq.
cap independently for dla0 and dla1.

Bug 200585348
Bug 200521935

Change-Id: I34445df1abc3656138cfde06c23ea5a4c8694d07
Signed-off-by: Leon Yu <leoyu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2288876
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
tegra: host: t210: use per device policy 2020-01-08T10:24:13+00:00 Ken Chang kenc@nvidia.com 2019-07-12T06:46:20+00:00 2342da5679501364272d6c1263d6405afc45006d MLOCK feature in T210 host1x is not supported so change the resource policy for each engine to 'RESOURCE_PER_DEVICE' to serialize the taks from applications through a single channel to each hardware engine. This is with an exception on tsec which is using single channel operation. Bug 2550468 Change-Id: I166b8af286461a13e543f1da7495c34abc948241 Signed-off-by: Ken Chang <kenc@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2152237 (cherry picked from commit ff20edb0674dd9083395327a529e8674f3f70410) Reviewed-on: https://git-master.nvidia.com/r/2226976 GVS: Gerrit_Virtual_Submit Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
MLOCK feature in T210 host1x is not supported so change the resource
policy for each engine to 'RESOURCE_PER_DEVICE' to serialize the taks
from applications through a single channel to each hardware engine.
This is with an exception on tsec which is using single channel operation.

Bug 2550468

Change-Id: I166b8af286461a13e543f1da7495c34abc948241
Signed-off-by: Ken Chang <kenc@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2152237
(cherry picked from commit ff20edb0674dd9083395327a529e8674f3f70410)
Reviewed-on: https://git-master.nvidia.com/r/2226976
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
video: tegra: host: update T186 VIC actmon driver 2019-10-10T20:41:15+00:00 Aaron Tian atian@nvidia.com 2019-09-18T09:13:19+00:00 d6c7740ea2ddd9d5087d938e9ee3b3bc2c9b6d0a Modify T186/T210 VIC actmon driver and wmark_active governor to address the following issues: 1. To let VIC actmon reports accurate VIC active cycle counts, set static WEIGHT_COUNT in both VIC actmon and VIC IP block. It ensures VIC actmon can capture all activity signal toggle event from VIC. The value of WEIGHT_COUNT are equal to: 4 * (max VIC freq / VIC_actmon freq) = 4 * (1024 / 19.2) ~= 213 2. Since VIC actmon reports active "VIC clock cycle" instead of "VIC actmon clock cycle", "relative loading translation" should consider current VIC clock freq. E.g., - sample_period = 80 us, VIC freq = 115.2 Mhz - 9216 cycles represents 100% loading (115.2 * 80) 3. Update upper/lower wmark settings after VIC clock scaled completed, to ensure wmark settings are equil to 0 ~ 100% loading of current freq. - Register 'get_dev_status' instance in devfreq_dev_profile, to let wmark active governor can query current device freq. - Register devfreq transition notifier in wmark_active governor. It will query current device freq. and update corresponding wmark value after VIC freq. changed. Bug 200501949 Change-Id: Ic159eb93fddc37d55b0c9649a3afcb50ed82cac2 Signed-off-by: Aaron Tian <atian@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2200520 GVS: Gerrit_Virtual_Submit Reviewed-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
Modify T186/T210 VIC actmon driver and wmark_active governor
to address the following issues:

1. To let VIC actmon reports accurate VIC active
   cycle counts, set static WEIGHT_COUNT in both
   VIC actmon and VIC IP block. It ensures
   VIC actmon can capture all activity signal
   toggle event from VIC.

   The value of WEIGHT_COUNT are equal to:

   4 * (max VIC freq / VIC_actmon freq)
       = 4 * (1024 / 19.2)
      ~= 213

2. Since VIC actmon reports active "VIC clock
   cycle" instead of "VIC actmon clock cycle",
   "relative loading translation" should consider
   current VIC clock freq.

   E.g.,
     - sample_period = 80 us, VIC freq = 115.2 Mhz
     - 9216 cycles represents 100% loading
       (115.2 * 80)

3. Update upper/lower wmark settings after VIC
   clock scaled completed, to ensure wmark settings
   are equil to 0 ~ 100% loading of current freq.
   - Register 'get_dev_status' instance in
     devfreq_dev_profile, to let wmark active
     governor can query current device freq.
   - Register devfreq transition notifier in
     wmark_active governor. It will query current
     device freq. and update corresponding wmark
     value after VIC freq. changed.

Bug 200501949

Change-Id: Ic159eb93fddc37d55b0c9649a3afcb50ed82cac2
Signed-off-by: Aaron Tian <atian@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2200520
GVS: Gerrit_Virtual_Submit
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
video: tegra: host: Set DMA masks 2019-07-03T23:27:05+00:00 Mikko Perttunen mperttunen@nvidia.com 2019-06-19T07:08:54+00:00 5b369943147834088ad51b92942b746f9f347c99 Set DMA masks for host1x, engines, and context devices as per the following to support over 32 bits of address space: - T210: 34 bits - T186: 40 bits - T194: 40 bits Bug 200527850 Change-Id: I1e7495bbf90a2928c17c06c2728640a036f843d7 Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Puneet Saxena <puneets@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2139215 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
Set DMA masks for host1x, engines, and context devices
as per the following to support over 32 bits of address space:

- T210: 34 bits
- T186: 40 bits
- T194: 40 bits

Bug 200527850

Change-Id: I1e7495bbf90a2928c17c06c2728640a036f843d7
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2139215
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
video: tegra: host: nvdla, pva: add task information to fences 2019-04-23T15:49:20+00:00 Dmitry Antipov dantipov@nvidia.com 2018-12-28T12:56:36+00:00 db5d314a034ae81c499e76834a72a8f8a2e37c8b For NSys, we're interested in having detailed information on what task waits on a particular prefence or requests a particular postfence. This is implemented by adding two extra fields, 'task_syncpt_id' and 'task_syncpt_thresh' to 'struct nvhost_task_fence', to record the task this particular fence is associated with. To avoid race conditon in pva_submit (similar to what was fixed in 0c2065fd669926536f79fd9e8ec33f33cbdcae2e), PVA task memory management is changed to use simple kref-based scheme, much like it's done in DLA. Finally, this patch renames syncpoint fields of 'task_fence' to 'syncpt_id' and 'syncpt_thresh' to match the same field names in other events, which is intended to simplify Python scripting. JIRA DTSP-1662 JIRA DTSP-682 Bug 2568514 Signed-off-by: Dmitry Antipov <dantipov@nvidia.com> Change-Id: I4c55efcae15eb80a0d950882d6ff6e5ac706ab20 Reviewed-on: https://git-master.nvidia.com/r/1978175 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: Shridhar Rasal <srasal@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2099982 Reviewed-by: Mitch Harwell <mharwell@nvidia.com> Tested-by: Mitch Harwell <mharwell@nvidia.com> 
For NSys, we're interested in having detailed information on what task
waits on a particular prefence or requests a particular postfence.
This is implemented by adding two extra fields, 'task_syncpt_id' and
'task_syncpt_thresh' to 'struct nvhost_task_fence', to record the task
this particular fence is associated with.

To avoid race conditon in pva_submit (similar to what was fixed in
0c2065fd669926536f79fd9e8ec33f33cbdcae2e), PVA task memory management
is changed to use simple kref-based scheme, much like it's done in DLA.

Finally, this patch renames syncpoint fields of 'task_fence' to 'syncpt_id'
and 'syncpt_thresh' to match the same field names in other events, which
is intended to simplify Python scripting.

JIRA DTSP-1662
JIRA DTSP-682
Bug 2568514

Signed-off-by: Dmitry Antipov <dantipov@nvidia.com>
Change-Id: I4c55efcae15eb80a0d950882d6ff6e5ac706ab20
Reviewed-on: https://git-master.nvidia.com/r/1978175
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2099982
Reviewed-by: Mitch Harwell <mharwell@nvidia.com>
Tested-by: Mitch Harwell <mharwell@nvidia.com>
eventlib: unify NVDLA/PVA fence types and add fence recording 2018-08-28T16:24:21+00:00 Dmitry Antipov dantipov@nvidia.com 2018-08-14T11:17:05+00:00 c9d85a691fc2421c9bbf5b70091bfd591d4d11ef Bug 2170736 Change-Id: If4fdeda140bf2474a08beb2a0d7c3fc1737a1a66 Signed-off-by: Dmitry Antipov <dantipov@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1750906 Reviewed-by: Saleh Dindar <sdindar@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Colin Tracey <ctracey@nvidia.com> Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
Bug 2170736

Change-Id: If4fdeda140bf2474a08beb2a0d7c3fc1737a1a66
Signed-off-by: Dmitry Antipov <dantipov@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1750906
Reviewed-by: Saleh Dindar <sdindar@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Colin Tracey <ctracey@nvidia.com>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
video: tegra: host: vhost: support camera engines 2018-08-16T00:49:26+00:00 Damian Halas dhalas@nvidia.com 2018-06-21T18:02:45+00:00 a3655aa5352b3c77e318474664dd9e11d48207e8 Add support for virtual isp, vi, nvcsi engines on t194. The guest driver will not access those engines directly. They will be powered up by rmserver upon guest connecting. Access to engines' functionality will depend on RCE. Also, merge nvhost_ioctl_t194.h to nvhost_ioctl.h to avoid inconsecutive list of ids. JIRA EVLR-2589 JIRA EVLR-2479 JIRA EVLR-2591 Change-Id: Ib78b1d43f69b37606f5c2c378cb0547bb05f282f Signed-off-by: Damian Halas <dhalas@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1761945 GVS: Gerrit_Virtual_Submit Reviewed-by: Nirav Patel <nipatel@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
Add support for virtual isp, vi, nvcsi engines on t194.
The guest driver will not access those engines directly.
They will be powered up by rmserver upon guest connecting.
Access to engines' functionality will depend on RCE.

Also, merge nvhost_ioctl_t194.h to nvhost_ioctl.h
to avoid inconsecutive list of ids.

JIRA EVLR-2589
JIRA EVLR-2479
JIRA EVLR-2591

Change-Id: Ib78b1d43f69b37606f5c2c378cb0547bb05f282f
Signed-off-by: Damian Halas <dhalas@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1761945
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nirav Patel <nipatel@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
video: tegra: host: enumerate pva and dla from 0 2018-06-16T00:47:15+00:00 Damian Halas dhalas@nvidia.com 2018-06-07T21:59:41+00:00 44e15f5747b46646c41db35bc16c1d095414832f Even if pva0 or dla0 is disabled in the device tree the dev nodes for pva1 and dla1 should be enumerated from 0. To achieve this the patch introduces families of engines and dynamically creates proper devfs_name for them. JIRA VFND-4904 Change-Id: I3c69381f212024cf9d6cb5af8c104f3ca5392863 Signed-off-by: Damian Halas <dhalas@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1743013 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
Even if pva0 or dla0 is disabled in the device tree
the dev nodes for pva1 and dla1 should be enumerated
from 0.

To achieve this the patch introduces families of engines
and dynamically creates proper devfs_name for them.

JIRA VFND-4904

Change-Id: I3c69381f212024cf9d6cb5af8c104f3ca5392863
Signed-off-by: Damian Halas <dhalas@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1743013
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
video: tegra: host: eventlib support for falcons 2018-06-15T08:17:23+00:00 Srikar Srimath Tirumala srikars@nvidia.com 2018-06-01T04:05:50+00:00 ce3925c2da53d1e6024780727f0d62b587e89c75 * Replace the VIC method for timestamp logging with generic falcon timestamping method. * Expose the new falcon timestamping method to other falcon cores. * Enable task timestamping for nvenc. Bug 200312229 JIRA HOSTX-336 JIRA HOSTX-337 Change-Id: I6724f47db0cfca2fc962a7a479a1c370f37c2e31 Signed-off-by: Srikar Srimath Tirumala <srikars@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1736581 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
* Replace the VIC method for timestamp logging with generic falcon
  timestamping method.
* Expose the new falcon timestamping method to other falcon cores.
* Enable task timestamping for nvenc.

Bug 200312229
JIRA HOSTX-336
JIRA HOSTX-337

Change-Id: I6724f47db0cfca2fc962a7a479a1c370f37c2e31
Signed-off-by: Srikar Srimath Tirumala <srikars@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1736581
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>