<feed xmlns='http://www.w3.org/2005/Atom'>
<title>nvidia-tegra-modules.git/include/linux/dma-override.h, branch rtss22-ae</title>
<subtitle>NVIDIA's kernel modules to support tegra chips (used in Jetson boards)</subtitle>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvidia-tegra-modules.git/'/>
<entry>
<title>iommu: dma-override: do not use it for kernel-4.14</title>
<updated>2018-07-18T21:26:35+00:00</updated>
<author>
<name>Pritesh Raithatha</name>
<email>praithatha@nvidia.com</email>
</author>
<published>2018-07-09T12:22:09+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvidia-tegra-modules.git/commit/?id=968b53a455465ba8a44296500eae36ec9c0b3ce1'/>
<id>968b53a455465ba8a44296500eae36ec9c0b3ce1</id>
<content type='text'>
Kernel-4.14 is not using this dma override function so skip it
for K4.14.

Bug 200427376

Change-Id: I10f76ade31cd278df7c309440c991fa140cf43e0
Signed-off-by: Pritesh Raithatha &lt;praithatha@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/1774425
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam &lt;snikam@nvidia.com&gt;
Tested-by: Sachin Nikam &lt;snikam@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Kernel-4.14 is not using this dma override function so skip it
for K4.14.

Bug 200427376

Change-Id: I10f76ade31cd278df7c309440c991fa140cf43e0
Signed-off-by: Pritesh Raithatha &lt;praithatha@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/1774425
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam &lt;snikam@nvidia.com&gt;
Tested-by: Sachin Nikam &lt;snikam@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>iommu: arm-smmu: add support for NVLINK</title>
<updated>2017-09-13T07:43:14+00:00</updated>
<author>
<name>Pritesh Raithatha</name>
<email>praithatha@nvidia.com</email>
</author>
<published>2017-08-21T17:19:39+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvidia-tegra-modules.git/commit/?id=2503f1a541e270b47ccc77ce2617d5ecd793566c'/>
<id>2503f1a541e270b47ccc77ce2617d5ecd793566c</id>
<content type='text'>
All physical address &gt; 128 GB are treated as NVLINK addresses.

Whenever user specify DMA attribute with NVLINK, we will set bit-37 of
physical address so that it will be treated as NVLINK.

Bug 1964471

Change-Id: I781ef6350e0b7ae3d793bd3592667f96e6a48cfe
Signed-off-by: Pritesh Raithatha &lt;praithatha@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/1542855
Reviewed-by: svccoveritychecker &lt;svccoveritychecker@nvidia.com&gt;
Reviewed-by: Sachin Nikam &lt;snikam@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
All physical address &gt; 128 GB are treated as NVLINK addresses.

Whenever user specify DMA attribute with NVLINK, we will set bit-37 of
physical address so that it will be treated as NVLINK.

Bug 1964471

Change-Id: I781ef6350e0b7ae3d793bd3592667f96e6a48cfe
Signed-off-by: Pritesh Raithatha &lt;praithatha@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/1542855
Reviewed-by: svccoveritychecker &lt;svccoveritychecker@nvidia.com&gt;
Reviewed-by: Sachin Nikam &lt;snikam@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</pre>
</div>
</content>
</entry>
<entry>
<title>iommu: arm-smmu: remove bl format support</title>
<updated>2017-05-18T22:14:32+00:00</updated>
<author>
<name>Pritesh Raithatha</name>
<email>praithatha@nvidia.com</email>
</author>
<published>2017-05-17T10:38:15+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvidia-tegra-modules.git/commit/?id=fe14354d56c1f95a76d7e104d513b451178b6546'/>
<id>fe14354d56c1f95a76d7e104d513b451178b6546</id>
<content type='text'>
Hw team confirm that 39-bit needs to set before SMMU, that is
in iova address and client can do that directly. No changes
required from SMMU/DMA side.

Removing the support that we added.

Bug 1866465

Change-Id: Ifcde76c50e0086ce65c94757681eeac534e3460a
Signed-off-by: Pritesh Raithatha &lt;praithatha@nvidia.com&gt;
Reviewed-on: http://git-master/r/1483859
Reviewed-by: svccoveritychecker &lt;svccoveritychecker@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy &lt;vdumpa@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Hw team confirm that 39-bit needs to set before SMMU, that is
in iova address and client can do that directly. No changes
required from SMMU/DMA side.

Removing the support that we added.

Bug 1866465

Change-Id: Ifcde76c50e0086ce65c94757681eeac534e3460a
Signed-off-by: Pritesh Raithatha &lt;praithatha@nvidia.com&gt;
Reviewed-on: http://git-master/r/1483859
Reviewed-by: svccoveritychecker &lt;svccoveritychecker@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Reddy &lt;vdumpa@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>iommu: arm-smmu: add support for bl format</title>
<updated>2017-04-21T12:34:15+00:00</updated>
<author>
<name>Pritesh Raithatha</name>
<email>praithatha@nvidia.com</email>
</author>
<published>2017-02-20T15:00:27+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvidia-tegra-modules.git/commit/?id=47f00b09b57812008c985ab99803d092c725ad50'/>
<id>47f00b09b57812008c985ab99803d092c725ad50</id>
<content type='text'>
-Set 39th bit of pte when IOMMU_USE_BL_FORMAT specified in alloc_pte.
-Provide override functions for dma handle marshaling and qualifying
ioprot with 39th bit set when IOMMU_USE_BL_FORMAT specified and chip
is t19x.

Bug 1866465

Change-Id: Id35708364ba6db411d0c819d4ad7a8beeec7a432
Signed-off-by: Pritesh Raithatha &lt;praithatha@nvidia.com&gt;
Reviewed-on: http://git-master/r/1460454
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
-Set 39th bit of pte when IOMMU_USE_BL_FORMAT specified in alloc_pte.
-Provide override functions for dma handle marshaling and qualifying
ioprot with 39th bit set when IOMMU_USE_BL_FORMAT specified and chip
is t19x.

Bug 1866465

Change-Id: Id35708364ba6db411d0c819d4ad7a8beeec7a432
Signed-off-by: Pritesh Raithatha &lt;praithatha@nvidia.com&gt;
Reviewed-on: http://git-master/r/1460454
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
