nvidia-tegra-modules.git/include/dt-bindings/gpio, branch rtss22-ae NVIDIA's kernel modules to support tegra chips (used in Jetson boards) dt-bindings: Add various DT-Bindings headers 2018-05-04T11:32:56+00:00 Ishan Mittal imittal@nvidia.com 2016-04-04T10:51:25+00:00 788d572b0e384f1602607df2e4cec776444040b7 This pulls the DT-Binding headers needed to build T186 DTBs Change-Id: I809f719ff57e441d3921a868b6159a313a8ee7e1 Signed-off-by: Ishan Mittal <imittal@nvidia.com> Reviewed-on: http://git-master/r/1119738 
This pulls the DT-Binding headers needed to build
T186 DTBs

Change-Id: I809f719ff57e441d3921a868b6159a313a8ee7e1
Signed-off-by: Ishan Mittal <imittal@nvidia.com>
Reviewed-on: http://git-master/r/1119738
gpio: tegra: Port B moved to NON-AON GPIO 2017-06-06T08:35:25+00:00 Suresh Mangipudi smangipudi@nvidia.com 2017-06-05T10:10:52+00:00 a2325ffc01eeea20af0e142ef5bfc5fce8dc47c0 GPIO Port B was under AON GPIO, this has been moved under Non-AON GPIO. Bug 200315494 Change-Id: I2835c35b4d8d39f546134e755768bbc0f3b6cb06 Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com> Reviewed-on: http://git-master/r/1495957 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> 
GPIO Port B was under AON GPIO, this has been moved under
Non-AON GPIO.

Bug 200315494

Change-Id: I2835c35b4d8d39f546134e755768bbc0f3b6cb06
Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-on: http://git-master/r/1495957
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
gpio: tegra: Update T194 GPIO offset 2017-03-03T06:54:39+00:00 Suresh Mangipudi smangipudi@nvidia.com 2017-02-23T11:42:30+00:00 051460b5ccfbb6dbeb91a97af7f85319528cb73c Update the GPIO ports and offsets for T194 Change-Id: Iaca6233eeb5163c03c8cea7c8f5e62c5b856c7ac Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com> Reviewed-on: http://git-master/r/1310208 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> 
Update the GPIO ports and offsets for T194

Change-Id: Iaca6233eeb5163c03c8cea7c8f5e62c5b856c7ac
Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-on: http://git-master/r/1310208
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
tegra: GPIO: Add support for T194 GPIO 2017-01-12T11:13:50+00:00 Suresh Mangipudi smangipudi@nvidia.com 2016-12-23T10:24:57+00:00 cd7c4178bae9abf4d6723bf36dc3dcf91daec078 Add T194 GPIO tables for AON and MAIN GPIO's Add new compatible strings for T194 to support AON and MAIN GPIO's Bug 1842952 Change-Id: I8a90b9067165d348388e558ed2cc9e5517634133 Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com> Reviewed-on: http://git-master/r/1276130 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> 
Add T194 GPIO tables for AON and MAIN GPIO's
Add new compatible strings for T194 to support AON and MAIN GPIO's

Bug 1842952

Change-Id: I8a90b9067165d348388e558ed2cc9e5517634133
Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-on: http://git-master/r/1276130
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
dt-bindings: gpio: Remove tegra186-gpio.h 2016-12-14T20:39:49+00:00 Mikko Perttunen mperttunen@nvidia.com 2016-12-12T11:09:18+00:00 d7af11d38d6852c502c24a95326962aa135a1a0c Move tegra186-gpio.h to kernel repositories. Bug 1834068 Change-Id: I715ee4833235e7e0f53ee970eae4c948dc3a943e Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-on: http://git-master/r/1269482 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Timo Alho <talho@nvidia.com> 
Move tegra186-gpio.h to kernel repositories.

Bug 1834068

Change-Id: I715ee4833235e7e0f53ee970eae4c948dc3a943e
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-on: http://git-master/r/1269482
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Timo Alho <talho@nvidia.com>
include: dt-binding: gpio: t18x: Get rid of unused macro 2016-11-02T07:06:41+00:00 Laxman Dewangan ldewangan@nvidia.com 2016-11-01T08:44:25+00:00 62b410a47dd5788b6702da824210a1c0847a0a0c Following macros are not used and hence remove it from code tree: TEGRA_GPIO_RANGE TEGRA_GPIO_BASE TEGRA_GPIO TEGRA_GPIO_AON Change-Id: I7b27b72da0bcbe17fec0fff875c0919002bd47b1 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/1245733 Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com> GVS: Gerrit_Virtual_Submit 
Following macros are not used and hence remove it
from code tree:
	TEGRA_GPIO_RANGE
	TEGRA_GPIO_BASE
	TEGRA_GPIO
	TEGRA_GPIO_AON

Change-Id: I7b27b72da0bcbe17fec0fff875c0919002bd47b1
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/1245733
Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com>
GVS: Gerrit_Virtual_Submit
ARM: tegra: Add DT binding for Tegra186 GPIO controllers 2016-10-26T03:04:34+00:00 Stephen Warren swarren@nvidia.com 2016-04-12T17:46:37+00:00 c0d4ff71d5c677be65af9184bcd42f2899d1a8c8 Tegra186 contains two separate but mostly similar GPIO controllers. Register layout differs significantly from previous Tegra generations, and so a new binding is required to describe them in device tree. This patch adds that binding. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com> (cherry picked from commit ec6b925579b40225d58f0374ada0e40a003cde16) Change-Id: I0e1919eb8a2a1becf2cd5612ac6d371f34fd20b9 Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com> Reviewed-on: http://git-master/r/1242127 Tested-by: Laxman Dewangan <ldewangan@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> 
Tegra186 contains two separate but mostly similar GPIO controllers.
Register layout differs significantly from previous Tegra generations,
and so a new binding is required to describe them in device tree. This
patch adds that binding.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
(cherry picked from commit ec6b925579b40225d58f0374ada0e40a003cde16)
Change-Id: I0e1919eb8a2a1becf2cd5612ac6d371f34fd20b9
Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-on: http://git-master/r/1242127
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
gpio: t186: Align gpio macros for port to mainline 2016-10-21T19:34:06+00:00 Laxman Dewangan ldewangan@nvidia.com 2016-10-21T13:12:34+00:00 ce678356b78336c8baa59af1759a0ec2811236a7 There is two change in macro name for port in DT binding header in mainline: TEGRA_MAIN_GPIO_PORT for Main GPIO TEGRA_AON_GPIO_PORT for AON GPIO. make change as: TEGRA_GPIO_BANK_ID -> TEGRA_MAIN_GPIO_PORT TEGRA_AON_GPIO_BANK_ID -> TEGRA_AON_GPIO_PORT Change-Id: I92660e68abe6a361b1d0e8769cd97855abbb52aa Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/1240673 GVS: Gerrit_Virtual_Submit Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com> 
There is two change in macro name for port in DT binding header
in mainline:
	TEGRA_MAIN_GPIO_PORT for Main GPIO
	TEGRA_AON_GPIO_PORT for AON GPIO.

make change as:
	TEGRA_GPIO_BANK_ID -> TEGRA_MAIN_GPIO_PORT
	TEGRA_AON_GPIO_BANK_ID -> TEGRA_AON_GPIO_PORT

Change-Id: I92660e68abe6a361b1d0e8769cd97855abbb52aa
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/1240673
GVS: Gerrit_Virtual_Submit
Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com>
gpio: t186: Align driver to mainline DT binding 2016-10-17T09:43:14+00:00 Laxman Dewangan ldewangan@nvidia.com 2016-10-13T10:36:40+00:00 e23ff0bc32fd2a18eda5138fd40cbe49ec689757 The accepted DT binding document has the two GPIO nodes for normal GPIO and AON GPIO. Modify driver to align with DT binding and register two different GPIO driver. Change-Id: Ib53b4bdc575d77cc405c6c7f7c48a55b409eeba4 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/1235937 GVS: Gerrit_Virtual_Submit Reviewed-by: Venkat Reddy Talla <vreddytalla@nvidia.com> 
The accepted DT binding document has the two GPIO nodes for
normal GPIO and AON GPIO.

Modify driver to align with DT binding and register two
different GPIO driver.

Change-Id: Ib53b4bdc575d77cc405c6c7f7c48a55b409eeba4
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/1235937
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
dt-binding: t186: Add pin base for T186 pins 2016-10-14T22:35:22+00:00 Laxman Dewangan ldewangan@nvidia.com 2016-10-14T03:10:51+00:00 603446c8059693f7852b55164285a2b6cafbf84c Add pin base macro for the T186 pins so that it can be used from DTSI files. Change-Id: I86329266c3404c90476faa7b8d76a92eb9ef263b Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/1236384 Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com> GVS: Gerrit_Virtual_Submit 
Add pin base macro for the T186 pins so that it can
be used from DTSI files.

Change-Id: I86329266c3404c90476faa7b8d76a92eb9ef263b
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/1236384
Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com>
GVS: Gerrit_Virtual_Submit