<feed xmlns='http://www.w3.org/2005/Atom'>
<title>nvidia-tegra-modules.git/drivers/video/tegra/dc/window.c, branch gpu-paging</title>
<subtitle>NVIDIA's kernel modules to support tegra chips (used in Jetson boards)</subtitle>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvidia-tegra-modules.git/'/>
<entry>
<title>video: tegra: dc: window dirty flag check update</title>
<updated>2020-05-14T01:39:46+00:00</updated>
<author>
<name>Naveen Kumar S</name>
<email>nkumars@nvidia.com</email>
</author>
<published>2020-05-08T06:29:20+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvidia-tegra-modules.git/commit/?id=ffa7baac35a5506b60889bee6b9de0a211214c69'/>
<id>ffa7baac35a5506b60889bee6b9de0a211214c69</id>
<content type='text'>
There is an inconsistency in the way sync windows routine checks
if window update is completed.

tegra_nvdisp_update_windows routine deals with two windows, one is
the window pointer passed from fb (fb-window), and the other is its
counterpart window stored in display driver locally (dc-window).
win-&gt;dirty flag for both the windows are set to true, and frame end
interrupt is enabled
When the next frame end interrupt comes up, the IRQ handler invokes
tegra_dc_trigger_windows routine, which clears the dirty flag on
dc-window, but not on fb-window.

However, tegra_dc_sync_windows routine waits for the fb-window dirty
flag to get cleared, which never happens. This causes
tegra_dc_sync_windows to always wait until timeout (~1 second), and
then return.

To fix this, updated tegra_dc_windows_are_clean routine (invoked by
tegra_dc_sync_windows) to check if dc-window's dirty flag is cleared
instead of fb-window's.

Also, in window not-enabled path, set dc-window's csc_dirty flag since
that is the one checked in window enabled path.

In case of T210, tegradc_update_windows routine sets only dc-window's
dirty flag. Since fb-window dirty flag is not set, tegra_dc_sync_windows
routine didn't have to wait, which might have caused tearing. But since
tegra_dc_sync_windows now waits for dc-window's dirty flag to be
cleared, tearing will not happen now.

bug 200614584
bug 200432624

Change-Id: Ie77ba47d6277b429dade4e320ea4d093e39f70cb
Signed-off-by: Naveen Kumar S &lt;nkumars@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2341240
Reviewed-by: Shu Zhong &lt;shuz@nvidia.com&gt;
Reviewed-by: automaticguardword &lt;automaticguardword@nvidia.com&gt;
Reviewed-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
There is an inconsistency in the way sync windows routine checks
if window update is completed.

tegra_nvdisp_update_windows routine deals with two windows, one is
the window pointer passed from fb (fb-window), and the other is its
counterpart window stored in display driver locally (dc-window).
win-&gt;dirty flag for both the windows are set to true, and frame end
interrupt is enabled
When the next frame end interrupt comes up, the IRQ handler invokes
tegra_dc_trigger_windows routine, which clears the dirty flag on
dc-window, but not on fb-window.

However, tegra_dc_sync_windows routine waits for the fb-window dirty
flag to get cleared, which never happens. This causes
tegra_dc_sync_windows to always wait until timeout (~1 second), and
then return.

To fix this, updated tegra_dc_windows_are_clean routine (invoked by
tegra_dc_sync_windows) to check if dc-window's dirty flag is cleared
instead of fb-window's.

Also, in window not-enabled path, set dc-window's csc_dirty flag since
that is the one checked in window enabled path.

In case of T210, tegradc_update_windows routine sets only dc-window's
dirty flag. Since fb-window dirty flag is not set, tegra_dc_sync_windows
routine didn't have to wait, which might have caused tearing. But since
tegra_dc_sync_windows now waits for dc-window's dirty flag to be
cleared, tearing will not happen now.

bug 200614584
bug 200432624

Change-Id: Ie77ba47d6277b429dade4e320ea4d093e39f70cb
Signed-off-by: Naveen Kumar S &lt;nkumars@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2341240
Reviewed-by: Shu Zhong &lt;shuz@nvidia.com&gt;
Reviewed-by: automaticguardword &lt;automaticguardword@nvidia.com&gt;
Reviewed-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>video: tegra: dc: don't warn when window Bpp is 1</title>
<updated>2019-04-17T08:29:48+00:00</updated>
<author>
<name>Chun Xu</name>
<email>chunx@nvidia.com</email>
</author>
<published>2018-12-06T03:11:39+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvidia-tegra-modules.git/commit/?id=bd1b2a8bc0e56771ef220ef44df2c9804d186772'/>
<id>bd1b2a8bc0e56771ef220ef44df2c9804d186772</id>
<content type='text'>
For T21x based display controller driver, kernel warning was present
whenever flip was requested with non-2Bpp/4Bpp format. However a recent
optimization in user-space requires use of TEGRA_DC_EXT_FMT_T_P8 format
which is a 1Bpp format which causes kernel warning to be printed.
Avoid kernel warning by adding 1Bpp as a as valid format size with max
value set to 8 as per manuals.

Bug 200458820
Bug 2547426

Change-Id: I797fb394061f4e1818d29c0cb1a587468a6fa57c
Signed-off-by: Chun Xu &lt;chunx@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/1966556
Reviewed-by: Naveen Kumar S &lt;nkumars@nvidia.com&gt;
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ujwal Patel &lt;ujwalp@nvidia.com&gt;
Tested-by: Prafull Suryawanshi &lt;prafulls@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
For T21x based display controller driver, kernel warning was present
whenever flip was requested with non-2Bpp/4Bpp format. However a recent
optimization in user-space requires use of TEGRA_DC_EXT_FMT_T_P8 format
which is a 1Bpp format which causes kernel warning to be printed.
Avoid kernel warning by adding 1Bpp as a as valid format size with max
value set to 8 as per manuals.

Bug 200458820
Bug 2547426

Change-Id: I797fb394061f4e1818d29c0cb1a587468a6fa57c
Signed-off-by: Chun Xu &lt;chunx@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/1966556
Reviewed-by: Naveen Kumar S &lt;nkumars@nvidia.com&gt;
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ujwal Patel &lt;ujwalp@nvidia.com&gt;
Tested-by: Prafull Suryawanshi &lt;prafulls@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>video: tegra: dc: fix YUV420 10 bit mode blanking</title>
<updated>2018-11-19T19:13:54+00:00</updated>
<author>
<name>Prafull Suryawanshi</name>
<email>prafulls@nvidia.com</email>
</author>
<published>2018-10-31T10:11:25+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvidia-tegra-modules.git/commit/?id=bd4b0158f2cccf5a0449e9646c1b57ed016e2aef'/>
<id>bd4b0158f2cccf5a0449e9646c1b57ed016e2aef</id>
<content type='text'>
Fix the condition when a special background pattern should be
send in YUV420 10 bit mode. The previous condition did not match
the expection of latest packing scheme used by user space. This
caused green screen being shown whenever user space removed
content from windows.

bug 200458465

Change-Id: I4ea60b130a3d7d2ddb5bd73c49a29048c53c5347
Signed-off-by: Prafull Suryawanshi &lt;prafulls@nvidia.com&gt;
Signed-off-by: Michael Frydrych &lt;mfrydrych@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/1940146
(cherry picked from commit cbbbe054cfda415b9ee44036a175af8a4ac1aa9c)
Reviewed-on: https://git-master.nvidia.com/r/1950254
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venu Byravarasu &lt;vbyravarasu@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Fix the condition when a special background pattern should be
send in YUV420 10 bit mode. The previous condition did not match
the expection of latest packing scheme used by user space. This
caused green screen being shown whenever user space removed
content from windows.

bug 200458465

Change-Id: I4ea60b130a3d7d2ddb5bd73c49a29048c53c5347
Signed-off-by: Prafull Suryawanshi &lt;prafulls@nvidia.com&gt;
Signed-off-by: Michael Frydrych &lt;mfrydrych@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/1940146
(cherry picked from commit cbbbe054cfda415b9ee44036a175af8a4ac1aa9c)
Reviewed-on: https://git-master.nvidia.com/r/1950254
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venu Byravarasu &lt;vbyravarasu@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tegra:dc: new blend mode TEGRA_DC_EXT_BLEND_ADD</title>
<updated>2018-08-16T00:49:18+00:00</updated>
<author>
<name>Michael Frydrych</name>
<email>mfrydrych@nvidia.com</email>
</author>
<published>2018-08-02T10:41:39+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvidia-tegra-modules.git/commit/?id=e056bdcd08bc0afc904463da446b705fd8d0eb7b'/>
<id>e056bdcd08bc0afc904463da446b705fd8d0eb7b</id>
<content type='text'>
This adds a new blend mode TEGRA_DC_EXT_BLEND_ADD to a set of
possible display blending modes. The blend mode merely adds the
'src' color to 'dst'.

Bug 1637393
Bug 1816103
Bug 2187408

Change-Id: Ie36ef464d0e95d8d0b13306a3a20f972605aac2a
Signed-off-by: Michael Frydrych &lt;mfrydrych@nvidia.com&gt;
Reviewed-on: http://git-master/r/1260068
(cherry picked from commit 0a2ce7a25daafd1d6cc78e8a90845eacfbdcdca8)
Reviewed-on: http://git-master/r/1320483
(cherry picked from commit 2d0d8a4da946803b0315fa2bb5fb3bf05c0b2068)
Reviewed-on: https://git-master.nvidia.com/r/1791095
(cherry picked from commit ce88297de4884b2738c8bf3d4aa1fb407421458b)
Reviewed-on: https://git-master.nvidia.com/r/1520538
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mitch Luban &lt;mluban@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This adds a new blend mode TEGRA_DC_EXT_BLEND_ADD to a set of
possible display blending modes. The blend mode merely adds the
'src' color to 'dst'.

Bug 1637393
Bug 1816103
Bug 2187408

Change-Id: Ie36ef464d0e95d8d0b13306a3a20f972605aac2a
Signed-off-by: Michael Frydrych &lt;mfrydrych@nvidia.com&gt;
Reviewed-on: http://git-master/r/1260068
(cherry picked from commit 0a2ce7a25daafd1d6cc78e8a90845eacfbdcdca8)
Reviewed-on: http://git-master/r/1320483
(cherry picked from commit 2d0d8a4da946803b0315fa2bb5fb3bf05c0b2068)
Reviewed-on: https://git-master.nvidia.com/r/1791095
(cherry picked from commit ce88297de4884b2738c8bf3d4aa1fb407421458b)
Reviewed-on: https://git-master.nvidia.com/r/1520538
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mitch Luban &lt;mluban@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>video: dc: enable indexed formats in bypass mode</title>
<updated>2018-08-16T00:49:14+00:00</updated>
<author>
<name>Michael Frydrych</name>
<email>mfrydrych@nvidia.com</email>
</author>
<published>2018-04-20T11:23:09+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvidia-tegra-modules.git/commit/?id=b3678a8ee6b4dc2fdec0b72bfb960825b1002a3e'/>
<id>b3678a8ee6b4dc2fdec0b72bfb960825b1002a3e</id>
<content type='text'>
User space may request expansion of indexed surface in yuv bypass
mode. Hence the condition for enabling LUT palette must be
modified.

Jira MGTWOD-352
Bug 2187408

Change-Id: I12a171b0111d249d8d6a8a5b40a3e6f5992c3aeb
Signed-off-by: Michael Frydrych &lt;mfrydrych@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/1764294
(cherry picked from commit dddba1e2952e152416fb385f55faeaac278e24f7)
Reviewed-on: https://git-master.nvidia.com/r/1796652
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mitch Luban &lt;mluban@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
User space may request expansion of indexed surface in yuv bypass
mode. Hence the condition for enabling LUT palette must be
modified.

Jira MGTWOD-352
Bug 2187408

Change-Id: I12a171b0111d249d8d6a8a5b40a3e6f5992c3aeb
Signed-off-by: Michael Frydrych &lt;mfrydrych@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/1764294
(cherry picked from commit dddba1e2952e152416fb385f55faeaac278e24f7)
Reviewed-on: https://git-master.nvidia.com/r/1796652
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mitch Luban &lt;mluban@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>video: dc: disable scaling filter in bypass mode</title>
<updated>2018-08-16T00:49:10+00:00</updated>
<author>
<name>Michael Frydrych</name>
<email>mfrydrych@nvidia.com</email>
</author>
<published>2018-06-28T09:51:05+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvidia-tegra-modules.git/commit/?id=eafe5280f4dc2430103329715f22dc7e11f603d9'/>
<id>eafe5280f4dc2430103329715f22dc7e11f603d9</id>
<content type='text'>
User space may request scaling without filtering in yuv bypass
mode. Hence enabling the scaling filters must be conditioned on
bypass mode flag.

Jira MGTWOD-352
Bug 2187408

Change-Id: I0d24c252d7ed50b5e0ee51acd068130ac207d35c
Signed-off-by: Michael Frydrych &lt;mfrydrych@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/1764293
(cherry picked from commit fa0ada7e2da681946c2990ccfb1dc477798822cc)
Reviewed-on: https://git-master.nvidia.com/r/1796651
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mitch Luban &lt;mluban@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
User space may request scaling without filtering in yuv bypass
mode. Hence enabling the scaling filters must be conditioned on
bypass mode flag.

Jira MGTWOD-352
Bug 2187408

Change-Id: I0d24c252d7ed50b5e0ee51acd068130ac207d35c
Signed-off-by: Michael Frydrych &lt;mfrydrych@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/1764293
(cherry picked from commit fa0ada7e2da681946c2990ccfb1dc477798822cc)
Reviewed-on: https://git-master.nvidia.com/r/1796651
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mitch Luban &lt;mluban@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tegra: dc: remove NVDISPLAY ifdefs on window.c</title>
<updated>2018-02-11T13:07:08+00:00</updated>
<author>
<name>Ishwarya Balaji Gururajan</name>
<email>igururajan@nvidia.com</email>
</author>
<published>2017-09-27T01:39:53+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvidia-tegra-modules.git/commit/?id=dfd9413eccd04a2d3b7da6e989753c7154a08782'/>
<id>dfd9413eccd04a2d3b7da6e989753c7154a08782</id>
<content type='text'>
remove NVDISPLAY ifdefs on window.c. Use runtime APIs instead
to differentiate between chips.

Jira TDS-2762

Change-Id: I967a50c7dac3d98d8c6e5de344fac0ea44025b53
Signed-off-by: Ishwarya Balaji Gururajan &lt;igururajan@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/1568978
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
remove NVDISPLAY ifdefs on window.c. Use runtime APIs instead
to differentiate between chips.

Jira TDS-2762

Change-Id: I967a50c7dac3d98d8c6e5de344fac0ea44025b53
Signed-off-by: Ishwarya Balaji Gururajan &lt;igururajan@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/1568978
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dc: add support to set background color from flip</title>
<updated>2018-01-26T19:59:04+00:00</updated>
<author>
<name>Ishwarya Balaji Gururajan</name>
<email>igururajan@nvidia.com</email>
</author>
<published>2017-08-29T02:50:10+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvidia-tegra-modules.git/commit/?id=e800b46576a90463e85d8c9834ef5b35002712ae'/>
<id>e800b46576a90463e85d8c9834ef5b35002712ae</id>
<content type='text'>
adding kernel support to set background color from flip.

TDS-2661

Change-Id: Ic30725a25941cf892ad9b6bb75acb0ce942ca4ab
Signed-off-by: Ishwarya Balaji Gururajan &lt;igururajan@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/1547381
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
adding kernel support to set background color from flip.

TDS-2661

Change-Id: Ic30725a25941cf892ad9b6bb75acb0ce942ca4ab
Signed-off-by: Ishwarya Balaji Gururajan &lt;igururajan@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/1547381
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tegra: display: check return value in fb.c</title>
<updated>2017-12-26T21:01:23+00:00</updated>
<author>
<name>Chun Xu</name>
<email>chunx@nvidia.com</email>
</author>
<published>2017-11-27T03:50:29+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvidia-tegra-modules.git/commit/?id=5832ff8b08f8107c1b69a0ad9ca74b4488dd6ee7'/>
<id>5832ff8b08f8107c1b69a0ad9ca74b4488dd6ee7</id>
<content type='text'>
Bug 1918318
Bug 200364968

Change-Id: I687c6b370b1126ef616e483aac0f7f0f63f3acbc
Signed-off-by: Chun Xu &lt;chunx@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/1615294
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Naveen Kumar S &lt;nkumars@nvidia.com&gt;
Reviewed-by: Shu Zhong &lt;shuz@nvidia.com&gt;
Reviewed-by: Mitch Luban &lt;mluban@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Bug 1918318
Bug 200364968

Change-Id: I687c6b370b1126ef616e483aac0f7f0f63f3acbc
Signed-off-by: Chun Xu &lt;chunx@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/1615294
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Naveen Kumar S &lt;nkumars@nvidia.com&gt;
Reviewed-by: Shu Zhong &lt;shuz@nvidia.com&gt;
Reviewed-by: Mitch Luban &lt;mluban@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>video: tegra: dc: update permission strings</title>
<updated>2017-11-25T11:28:43+00:00</updated>
<author>
<name>Ujwal Patel</name>
<email>ujwalp@nvidia.com</email>
</author>
<published>2017-11-23T19:53:20+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvidia-tegra-modules.git/commit/?id=4ef2cc4b475a0293e1a79a9b2e4aac7fbb53b786'/>
<id>4ef2cc4b475a0293e1a79a9b2e4aac7fbb53b786</id>
<content type='text'>
Replace permission strings with octal values as per new
upstream guidelines.

Link: http://lkml.kernel.org/r/7232ef011d05a92f4caa86a5e9830d87966a2eaf.1470180926.git.joe@perches.com

Bug 2019748

Change-Id: Ie2fb0cea47607c99830278cbbe65a67c5f81e3c2
Signed-off-by: Ujwal Patel &lt;ujwalp@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/1604075
Reviewed-by: Shu Zhong &lt;shuz@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Replace permission strings with octal values as per new
upstream guidelines.

Link: http://lkml.kernel.org/r/7232ef011d05a92f4caa86a5e9830d87966a2eaf.1470180926.git.joe@perches.com

Bug 2019748

Change-Id: Ie2fb0cea47607c99830278cbbe65a67c5f81e3c2
Signed-off-by: Ujwal Patel &lt;ujwalp@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/1604075
Reviewed-by: Shu Zhong &lt;shuz@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
