<feed xmlns='http://www.w3.org/2005/Atom'>
<title>nvidia-tegra-modules.git/drivers/thermal, branch gpu-paging</title>
<subtitle>NVIDIA's kernel modules to support tegra chips (used in Jetson boards)</subtitle>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvidia-tegra-modules.git/'/>
<entry>
<title>pwm: fan: get regulator name from DT</title>
<updated>2021-07-05T17:55:18+00:00</updated>
<author>
<name>Aaron Tian</name>
<email>atian@nvidia.com</email>
</author>
<published>2021-06-24T12:50:44+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvidia-tegra-modules.git/commit/?id=1a370dd0df9670b9b0f1e347c559609d2a1b18b5'/>
<id>1a370dd0df9670b9b0f1e347c559609d2a1b18b5</id>
<content type='text'>
To support platforms that used common power supply for
PWM fan, configure regulator name by DT property:
regulator_name. Default regulator name is "vdd-fan" when
the DT property does not exist.

Bug 200743936

Change-Id: I6951e340e5444141a72de5187e3887de49244caf
Signed-off-by: Aaron Tian &lt;atian@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2549408
Reviewed-by: svcacv &lt;svcacv@nvidia.com&gt;
Reviewed-by: svc-mobile-coverity &lt;svc-mobile-coverity@nvidia.com&gt;
Reviewed-by: Sandipan Patra &lt;spatra@nvidia.com&gt;
Reviewed-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
To support platforms that used common power supply for
PWM fan, configure regulator name by DT property:
regulator_name. Default regulator name is "vdd-fan" when
the DT property does not exist.

Bug 200743936

Change-Id: I6951e340e5444141a72de5187e3887de49244caf
Signed-off-by: Aaron Tian &lt;atian@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2549408
Reviewed-by: svcacv &lt;svcacv@nvidia.com&gt;
Reviewed-by: svc-mobile-coverity &lt;svc-mobile-coverity@nvidia.com&gt;
Reviewed-by: Sandipan Patra &lt;spatra@nvidia.com&gt;
Reviewed-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</pre>
</div>
</content>
</entry>
<entry>
<title>pwm: fan: fix deadlock due to incorrect locking</title>
<updated>2021-05-25T14:24:23+00:00</updated>
<author>
<name>Sumit Gupta</name>
<email>sumitg@nvidia.com</email>
</author>
<published>2021-03-24T14:11:56+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvidia-tegra-modules.git/commit/?id=2c40a6bc48f6701fe44cb7edadca26f6a40892da'/>
<id>2c40a6bc48f6701fe44cb7edadca26f6a40892da</id>
<content type='text'>
Bug 3227296
Bug 200695596
Bug 200728417

Signed-off-by: Sumit Gupta &lt;sumitg@nvidia.com&gt;
Change-Id: Ib64915556d285bd798e95da81a261eb2c16b4dab
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2503884
Reviewed-by: svcacv &lt;svcacv@nvidia.com&gt;
Reviewed-by: svc-mobile-coverity &lt;svc-mobile-coverity@nvidia.com&gt;
Reviewed-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
Tested-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Bug 3227296
Bug 200695596
Bug 200728417

Signed-off-by: Sumit Gupta &lt;sumitg@nvidia.com&gt;
Change-Id: Ib64915556d285bd798e95da81a261eb2c16b4dab
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2503884
Reviewed-by: svcacv &lt;svcacv@nvidia.com&gt;
Reviewed-by: svc-mobile-coverity &lt;svc-mobile-coverity@nvidia.com&gt;
Reviewed-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
Tested-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>thermal: userspace_alert: Fix automatic loading of userspace_alert</title>
<updated>2021-04-16T15:10:28+00:00</updated>
<author>
<name>Jon Hunter</name>
<email>jonathanh@nvidia.com</email>
</author>
<published>2021-04-13T13:30:12+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvidia-tegra-modules.git/commit/?id=1eceeacf73b14e3684457e4e828bd572077e6ad6'/>
<id>1eceeacf73b14e3684457e4e828bd572077e6ad6</id>
<content type='text'>
The userspace_alert driver is not automatically loaded on boot because
the MODULE_DEVICE_TABLE definition for the driver is missing. Add the
MODULE_DEVICE_TABLE for the userspace_alert driver so that the modalias
is created and the driver is automatically loaded on boot.

JIRA LS-32
Bug 200721211

Change-Id: I2cca5bd4118ab593b5aa9ceea606eddcf190ca7d
Signed-off-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2514231
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Reviewed-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The userspace_alert driver is not automatically loaded on boot because
the MODULE_DEVICE_TABLE definition for the driver is missing. Add the
MODULE_DEVICE_TABLE for the userspace_alert driver so that the modalias
is created and the driver is automatically loaded on boot.

JIRA LS-32
Bug 200721211

Change-Id: I2cca5bd4118ab593b5aa9ceea606eddcf190ca7d
Signed-off-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2514231
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Reviewed-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pwm_fan: Logically dead code</title>
<updated>2021-03-30T20:42:07+00:00</updated>
<author>
<name>Smriti Sharma</name>
<email>smritis@nvidia.com</email>
</author>
<published>2021-02-09T09:52:30+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvidia-tegra-modules.git/commit/?id=dee4007a6666d1c40f19b8b276e5322eea54dc79'/>
<id>dee4007a6666d1c40f19b8b276e5322eea54dc79</id>
<content type='text'>
The value of fan_data cannot be NULL

This fix coverity issue : 10075165

Bug 200689436

Change-Id: I406dedbf919bd746c169c8c96e606c38d9e6025b
Signed-off-by: Smriti Sharma &lt;smritis@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2499906
Reviewed-by: svcacv &lt;svcacv@nvidia.com&gt;
Reviewed-by: svc-mobile-coverity &lt;svc-mobile-coverity@nvidia.com&gt;
Reviewed-by: Phoenix Jung &lt;pjung@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The value of fan_data cannot be NULL

This fix coverity issue : 10075165

Bug 200689436

Change-Id: I406dedbf919bd746c169c8c96e606c38d9e6025b
Signed-off-by: Smriti Sharma &lt;smritis@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2499906
Reviewed-by: svcacv &lt;svcacv@nvidia.com&gt;
Reviewed-by: svc-mobile-coverity &lt;svc-mobile-coverity@nvidia.com&gt;
Reviewed-by: Phoenix Jung &lt;pjung@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</pre>
</div>
</content>
</entry>
<entry>
<title>pwm: fan: spinlock bad magic error</title>
<updated>2021-03-16T20:10:07+00:00</updated>
<author>
<name>Sumit Gupta</name>
<email>sumitg@nvidia.com</email>
</author>
<published>2021-03-10T04:54:28+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvidia-tegra-modules.git/commit/?id=0c09aa159cc6106adc5bbe4e12cceb25af5bc517'/>
<id>0c09aa159cc6106adc5bbe4e12cceb25af5bc517</id>
<content type='text'>
Fix spinlock bad magic error on enablng debug macro.

 FAN rising trip_level:1 cur_temp:50000 trip_temps[2]:63000
 BUG: spinlock bad magic on CPU#0, kworker/u17:0/1591
  lock: 0xffffffc7d0c07c78, .magic: 00000000, .owner: &lt;none&gt;/-1, .owner_cpu: 0
 CPU: 0 PID: 1591 Comm: kworker/u17:0 Not tainted 4.9.230-rt148-tegra #1
 Hardware name: Jetson-AGX (DT)
 Workqueue: thermal-fan-est therm_fan_est_work_func
 Call trace:
 [&lt;ffffff800808b318&gt;] dump_backtrace+0x0/0x198
 [&lt;ffffff800808b8d4&gt;] show_stack+0x24/0x30
 [&lt;ffffff800844f69c&gt;] dump_stack+0xa0/0xc4
 [&lt;ffffff80081137d4&gt;] spin_dump+0x84/0xb0
 [&lt;ffffff80081138c4&gt;] do_raw_spin_lock+0xc4/0x100
 [&lt;ffffff8008f60068&gt;] _raw_spin_lock_irqsave+0x38/0x48
 [&lt;ffffff8008f5e744&gt;] rt_mutex_slowlock.constprop.6+0x54/0xd0
 [&lt;ffffff8008f5ea94&gt;] rt_mutex_lock_state+0x5c/0x88
 [&lt;ffffff8008f5eae4&gt;] rt_mutex_lock+0x24/0x30
 [&lt;ffffff8008f608d8&gt;] _mutex_lock+0x20/0x30
 [&lt;ffffff8008b767c4&gt;] fan_update_target_pwm+0x54/0x248
 [&lt;ffffff8008b76fd4&gt;] pwm_fan_set_cur_state+0x174/0x198
 [&lt;ffffff8008b624ec&gt;] thermal_cdev_update+0xa4/0x200
 [&lt;ffffff8008b6ae20&gt;] pid_thermal_gov_throttle+0x2b0/0x3d0
 [&lt;ffffff8008b641bc&gt;] handle_thermal_trip+0x84/0x258
 [&lt;ffffff8008b644cc&gt;] thermal_zone_device_update+0x104/0x220
 [&lt;ffffff80087cca74&gt;] therm_fan_est_work_func+0x344/0x3b0
 [&lt;ffffff80080d0d8c&gt;] process_one_work+0x1cc/0x4b0
 [&lt;ffffff80080d11d0&gt;] worker_thread+0x160/0x510
 [&lt;ffffff80080d79ac&gt;] kthread+0xec/0xf0
 [&lt;ffffff80080830a0&gt;] ret_from_fork+0x10/0x30

Bug 3227296
Bug 200695596

Signed-off-by: Sumit Gupta &lt;sumitg@nvidia.com&gt;
Change-Id: I63d2b6316ccbe5b6843e90bcd377cc4cb16da24b
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2496144
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Reviewed-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Reviewed-by: svc-mobile-coverity &lt;svc-mobile-coverity@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Fix spinlock bad magic error on enablng debug macro.

 FAN rising trip_level:1 cur_temp:50000 trip_temps[2]:63000
 BUG: spinlock bad magic on CPU#0, kworker/u17:0/1591
  lock: 0xffffffc7d0c07c78, .magic: 00000000, .owner: &lt;none&gt;/-1, .owner_cpu: 0
 CPU: 0 PID: 1591 Comm: kworker/u17:0 Not tainted 4.9.230-rt148-tegra #1
 Hardware name: Jetson-AGX (DT)
 Workqueue: thermal-fan-est therm_fan_est_work_func
 Call trace:
 [&lt;ffffff800808b318&gt;] dump_backtrace+0x0/0x198
 [&lt;ffffff800808b8d4&gt;] show_stack+0x24/0x30
 [&lt;ffffff800844f69c&gt;] dump_stack+0xa0/0xc4
 [&lt;ffffff80081137d4&gt;] spin_dump+0x84/0xb0
 [&lt;ffffff80081138c4&gt;] do_raw_spin_lock+0xc4/0x100
 [&lt;ffffff8008f60068&gt;] _raw_spin_lock_irqsave+0x38/0x48
 [&lt;ffffff8008f5e744&gt;] rt_mutex_slowlock.constprop.6+0x54/0xd0
 [&lt;ffffff8008f5ea94&gt;] rt_mutex_lock_state+0x5c/0x88
 [&lt;ffffff8008f5eae4&gt;] rt_mutex_lock+0x24/0x30
 [&lt;ffffff8008f608d8&gt;] _mutex_lock+0x20/0x30
 [&lt;ffffff8008b767c4&gt;] fan_update_target_pwm+0x54/0x248
 [&lt;ffffff8008b76fd4&gt;] pwm_fan_set_cur_state+0x174/0x198
 [&lt;ffffff8008b624ec&gt;] thermal_cdev_update+0xa4/0x200
 [&lt;ffffff8008b6ae20&gt;] pid_thermal_gov_throttle+0x2b0/0x3d0
 [&lt;ffffff8008b641bc&gt;] handle_thermal_trip+0x84/0x258
 [&lt;ffffff8008b644cc&gt;] thermal_zone_device_update+0x104/0x220
 [&lt;ffffff80087cca74&gt;] therm_fan_est_work_func+0x344/0x3b0
 [&lt;ffffff80080d0d8c&gt;] process_one_work+0x1cc/0x4b0
 [&lt;ffffff80080d11d0&gt;] worker_thread+0x160/0x510
 [&lt;ffffff80080d79ac&gt;] kthread+0xec/0xf0
 [&lt;ffffff80080830a0&gt;] ret_from_fork+0x10/0x30

Bug 3227296
Bug 200695596

Signed-off-by: Sumit Gupta &lt;sumitg@nvidia.com&gt;
Change-Id: I63d2b6316ccbe5b6843e90bcd377cc4cb16da24b
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2496144
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Reviewed-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Reviewed-by: svc-mobile-coverity &lt;svc-mobile-coverity@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>thermal: continuous: add custom dt entry support</title>
<updated>2021-01-07T10:25:44+00:00</updated>
<author>
<name>Karthik Mantravadi</name>
<email>mkarthik@nvidia.com</email>
</author>
<published>2020-12-30T16:04:30+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvidia-tegra-modules.git/commit/?id=115da7825ec197d4ed0eb7d84880e8821e69c90f'/>
<id>115da7825ec197d4ed0eb7d84880e8821e69c90f</id>
<content type='text'>
Why?
In the case of therm-fan-est driver, the dt entry is not added
as part of thermal-zones. Hence, any continuous governor parameters
defined under therm-fan-est node will not be considered by the
continuous governor while binding to the thermal zone.

How?
Expose the dt parsing logic in continuous governor driver. This way
therm-fan-est driver can call the dt parsing function passing the
dt node defined under therm-fan-est dt entry.

Bug 200594433

Change-Id: I06f1653209887f674db0636fe6f5803771d46877
Signed-off-by: Karthik Mantravadi &lt;mkarthik@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2464743
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Why?
In the case of therm-fan-est driver, the dt entry is not added
as part of thermal-zones. Hence, any continuous governor parameters
defined under therm-fan-est node will not be considered by the
continuous governor while binding to the thermal zone.

How?
Expose the dt parsing logic in continuous governor driver. This way
therm-fan-est driver can call the dt parsing function passing the
dt node defined under therm-fan-est dt entry.

Bug 200594433

Change-Id: I06f1653209887f674db0636fe6f5803771d46877
Signed-off-by: Karthik Mantravadi &lt;mkarthik@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2464743
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pwm: fan: Add support for always on fan</title>
<updated>2020-12-25T17:38:32+00:00</updated>
<author>
<name>Mantravadi Karthik</name>
<email>mkarthik@nvidia.com</email>
</author>
<published>2020-11-20T07:43:40+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvidia-tegra-modules.git/commit/?id=c3cd2b4417ea8767d35b4e04ba9731fb58a2a477'/>
<id>c3cd2b4417ea8767d35b4e04ba9731fb58a2a477</id>
<content type='text'>
Why?
In case of continuous governor, the fan-poweron pwm
value is assumed to be at index 1 of pwm values.
In case of tmargin the pwm table would be reversed
(high to low) and hence the assumption is invalid.

How?
While calculating the pwm value in the case of
continuous governor, add a check if the cooling device
is always on fan. If true, for all values of temp,
pwm should be calculated instead of assigning 0.

Bug 200646929

Change-Id: Ibed572fa2af9f8bd36a4a4cbb472029e21aeb442
Signed-off-by: Mantravadi Karthik &lt;mkarthik@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2448826
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Reviewed-by: svc-mobile-coverity &lt;svc-mobile-coverity@nvidia.com&gt;
Reviewed-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Why?
In case of continuous governor, the fan-poweron pwm
value is assumed to be at index 1 of pwm values.
In case of tmargin the pwm table would be reversed
(high to low) and hence the assumption is invalid.

How?
While calculating the pwm value in the case of
continuous governor, add a check if the cooling device
is always on fan. If true, for all values of temp,
pwm should be calculated instead of assigning 0.

Bug 200646929

Change-Id: Ibed572fa2af9f8bd36a4a4cbb472029e21aeb442
Signed-off-by: Mantravadi Karthik &lt;mkarthik@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2448826
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Reviewed-by: svc-mobile-coverity &lt;svc-mobile-coverity@nvidia.com&gt;
Reviewed-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</pre>
</div>
</content>
</entry>
<entry>
<title>pwm: fan: sysfs node to print available profiles</title>
<updated>2020-12-18T15:40:03+00:00</updated>
<author>
<name>rkasirajan</name>
<email>rkasirajan@nvidia.com</email>
</author>
<published>2020-12-18T08:55:39+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvidia-tegra-modules.git/commit/?id=9425bab1bf4671b4b970410b798aa9ec76c213a4'/>
<id>9425bab1bf4671b4b970410b798aa9ec76c213a4</id>
<content type='text'>
Add sysfs node fan_available_profiles to print all avaiable
fan profiles.

Bug 200561921

Change-Id: Id70b0b85cdbdf0fc471c12b896a35df2e61571f4
Signed-off-by: rkasirajan &lt;rkasirajan@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2461876
Reviewed-by: svc-mobile-coverity &lt;svc-mobile-coverity@nvidia.com&gt;
Reviewed-by: Karthik Mantravadi &lt;mkarthik@nvidia.com&gt;
Reviewed-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add sysfs node fan_available_profiles to print all avaiable
fan profiles.

Bug 200561921

Change-Id: Id70b0b85cdbdf0fc471c12b896a35df2e61571f4
Signed-off-by: rkasirajan &lt;rkasirajan@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2461876
Reviewed-by: svc-mobile-coverity &lt;svc-mobile-coverity@nvidia.com&gt;
Reviewed-by: Karthik Mantravadi &lt;mkarthik@nvidia.com&gt;
Reviewed-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</pre>
</div>
</content>
</entry>
<entry>
<title>thermal: pwm-fan: Add support for tmargin</title>
<updated>2020-12-17T19:40:05+00:00</updated>
<author>
<name>Mantravadi Karthik</name>
<email>mkarthik@nvidia.com</email>
</author>
<published>2020-12-16T18:09:53+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvidia-tegra-modules.git/commit/?id=22fd87123c4a31566d621efd4ab007e481a0e937'/>
<id>22fd87123c4a31566d621efd4ab007e481a0e937</id>
<content type='text'>
Why?
Tmargin feature uses reverse pwm mapping in DT. The current
rru/rrd calculation logic assumes that the pwm table is in
ascending order. In the case of tmargin, the pwm table is
given in descending order.

How?
pwm fan dt node should have a "use_tmargin" identifier similar
to therm_fan_est dt node. This dt entry switches the logic in
rru/rrd calculation

Bug 200646929

Change-Id: I2042aaff5347553202212c6b69f707511bb9b7dd
Signed-off-by: Mantravadi Karthik &lt;mkarthik@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2460881
Tested-by: Rajkumar Kasirajan &lt;rkasirajan@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Reviewed-by: svc-mobile-coverity &lt;svc-mobile-coverity@nvidia.com&gt;
Reviewed-by: Rajkumar Kasirajan &lt;rkasirajan@nvidia.com&gt;
Reviewed-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Why?
Tmargin feature uses reverse pwm mapping in DT. The current
rru/rrd calculation logic assumes that the pwm table is in
ascending order. In the case of tmargin, the pwm table is
given in descending order.

How?
pwm fan dt node should have a "use_tmargin" identifier similar
to therm_fan_est dt node. This dt entry switches the logic in
rru/rrd calculation

Bug 200646929

Change-Id: I2042aaff5347553202212c6b69f707511bb9b7dd
Signed-off-by: Mantravadi Karthik &lt;mkarthik@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2460881
Tested-by: Rajkumar Kasirajan &lt;rkasirajan@nvidia.com&gt;
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
Reviewed-by: svc-mobile-coverity &lt;svc-mobile-coverity@nvidia.com&gt;
Reviewed-by: Rajkumar Kasirajan &lt;rkasirajan@nvidia.com&gt;
Reviewed-by: Bibek Basu &lt;bbasu@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
</pre>
</div>
</content>
</entry>
<entry>
<title>driver: thermal: add permission check</title>
<updated>2020-12-10T04:24:15+00:00</updated>
<author>
<name>Bbasu</name>
<email>bbasu@nvidia.com</email>
</author>
<published>2020-12-09T05:14:11+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/nvidia-tegra-modules.git/commit/?id=4123a84abb4551e0da922c8412556e79b4e8e569'/>
<id>4123a84abb4551e0da922c8412556e79b4e8e569</id>
<content type='text'>
Add CCPLEX permission check before accessing SOCTHERM
registers for T194. If access is not there, CCPLEX crashes and system
becomes unusable due to serror.
Need to add generic solution for such support
is next to be added.

Bug 3198147

Change-Id: I12bb51f57e5b9c1e92fbed58b96d1f6f2f8ff235
Signed-off-by: Bbasu &lt;bbasu@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2457187
Reviewed-by: svc-mobile-coverity &lt;svc-mobile-coverity@nvidia.com&gt;
Reviewed-by: Srikar Srimath Tirumala &lt;srikars@nvidia.com&gt;
Reviewed-by: Winnie Hsu &lt;whsu@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add CCPLEX permission check before accessing SOCTHERM
registers for T194. If access is not there, CCPLEX crashes and system
becomes unusable due to serror.
Need to add generic solution for such support
is next to be added.

Bug 3198147

Change-Id: I12bb51f57e5b9c1e92fbed58b96d1f6f2f8ff235
Signed-off-by: Bbasu &lt;bbasu@nvidia.com&gt;
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2457187
Reviewed-by: svc-mobile-coverity &lt;svc-mobile-coverity@nvidia.com&gt;
Reviewed-by: Srikar Srimath Tirumala &lt;srikars@nvidia.com&gt;
Reviewed-by: Winnie Hsu &lt;whsu@nvidia.com&gt;
Reviewed-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions &lt;svcmobile_promotions@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
