nvidia-tegra-modules.git/drivers/ras, branch gpu-paging NVIDIA's kernel modules to support tegra chips (used in Jetson boards) arm64: ras: print ERRSELR_EL1 for debug info 2019-04-01T16:12:16+00:00 sumitg sumitg@nvidia.com 2019-03-20T07:35:31+00:00 116c042d86f176d6c328c9b150602cd13a1f84b7 Printing ERRSELR_EL1 register for debugging info. There are multiple nodes for some units like L2, L3 etc. This will help to identify which node has caused error to further debug and isolate pattern. Bug 2536050 Change-Id: I41d10bdb97b6d276704d7333c36a5348c578cc53 Signed-off-by: sumitg <sumitg@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2077304 Reviewed-by: Fritz Nordby <fnordby@nvidia.com> Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
Printing ERRSELR_EL1 register for debugging info.
There are multiple nodes for some units like L2, L3 etc.
This will help to identify which node has caused error to
further debug and isolate pattern.

Bug 2536050

Change-Id: I41d10bdb97b6d276704d7333c36a5348c578cc53
Signed-off-by: sumitg <sumitg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2077304
Reviewed-by: Fritz Nordby <fnordby@nvidia.com>
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
arm64: ras: Add support for per core FHI 2018-08-21T08:41:59+00:00 Rohit Khanna rokhanna@nvidia.com 2018-02-23T00:33:19+00:00 e8726a1cd5d6eed6159dbef44b85bc3f56ecc1a1 There is one Fault Handling Interrupt(FHI) reserved in GIC for each CPU in CCPLEX. FHI is generated for correctable errors. This patch adds support for registering and handling per core FHI's. A core trigger will trigger interrupt to all CPUs in the cluster. A L2(cluster) trigger will trigger interrupt to all CPUs in cluster. A SCF/CMU(CCPLEX) trigger will trigger interrupt to all CPUs in CCPLEX Bug 200368651 Change-Id: I514fc48cf10d04f31255831c551b6f6a5f870ed7 Signed-off-by: Rohit Khanna <rokhanna@nvidia.com> Signed-off-by: Sumit Gupta <sumitg@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1662689 Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
There is one Fault Handling Interrupt(FHI) reserved in GIC for each
CPU in CCPLEX. FHI is generated for correctable errors.
This patch adds support for registering and handling per core FHI's.

A core trigger will trigger interrupt to all CPUs in the cluster.
A L2(cluster) trigger will trigger interrupt to all CPUs in cluster.
A SCF/CMU(CCPLEX) trigger will trigger interrupt to all CPUs in CCPLEX

Bug 200368651

Change-Id: I514fc48cf10d04f31255831c551b6f6a5f870ed7
Signed-off-by: Rohit Khanna <rokhanna@nvidia.com>
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1662689
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
arm64: ras: add support for MODS driver 2018-05-22T01:54:43+00:00 Rohit Khanna rokhanna@nvidia.com 2018-05-17T00:05:57+00:00 1da67ec6c5ebfabb8d6ec4c46b4a005266a54b88 MODS driver needs to be able to register fhi_callback with arm64_ras driver. This patch faciltates that as MODS will pass cookie as NULL, which will allow it to register the callback and not request_irq which is not needed. Bug 200409183 Bug 200409194 Change-Id: I57d201ceaeb61f82e50d013c077e5d59b3334c4c Signed-off-by: Rohit Khanna <rokhanna@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1721247 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Ellis Roberts <ellisr@nvidia.com> Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
MODS driver needs to be able to register
fhi_callback with arm64_ras driver.

This patch faciltates that as MODS will pass cookie
as NULL, which will allow it to register the callback and not
request_irq which is not needed.

Bug 200409183
Bug 200409194

Change-Id: I57d201ceaeb61f82e50d013c077e5d59b3334c4c
Signed-off-by: Rohit Khanna <rokhanna@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1721247
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ellis Roberts <ellisr@nvidia.com>
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
arm64: ras: clear errors bits after recording 2018-05-10T23:06:40+00:00 Rohit Khanna rokhanna@nvidia.com 2018-05-04T17:28:44+00:00 6a05b1613e3acfa364392de98dcbf2a507e5ada0 In case of SError or Uncorrectable Errors, clear the error by writing 1 to ERR_STATUS:UE and 11 to ERR_STATUS:UET. In case of FHI or Correctable Errors, clear the error by writing 11 to ERR_STATUS:CE In case of multiple errors, clear the OF bit by writing 1 so that writes to UE and CE can take effect. write 1 to clear ERR_STATUS:MV write 1 to clear ERR_STATUS:AV write 1 to clear ERR_STATUS:V Replace multiple writes to ERR_STATUS with single write to ERR_STATUS. Bug 200409183 Change-Id: I4fb38e808644220fb0fae2df7b1c0bc733af0b77 Signed-off-by: Rohit Khanna <rokhanna@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1708543 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
In case of SError or Uncorrectable Errors, clear the error by writing
1 to ERR_STATUS:UE and 11 to ERR_STATUS:UET.

In case of FHI or Correctable Errors, clear the error by writing 11
to ERR_STATUS:CE

In case of multiple errors, clear the OF bit by writing 1 so that
writes to UE and CE can take effect.

write 1 to clear ERR_STATUS:MV

write 1 to clear ERR_STATUS:AV

write 1 to clear ERR_STATUS:V

Replace multiple writes to ERR_STATUS with single write to ERR_STATUS.

Bug 200409183

Change-Id: I4fb38e808644220fb0fae2df7b1c0bc733af0b77
Signed-off-by: Rohit Khanna <rokhanna@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1708543
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
arm64: ras: Fix register_fhi_callback 2018-05-10T23:06:33+00:00 Rohit Khanna rokhanna@nvidia.com 2018-04-30T22:45:59+00:00 500aae6b29e76dfb658103d89e002e498f868472 The handler function can be invoked right after request_irq gets called. If FHI is triggered before CPU specific FHI handler is registered, there will be no one to clear the FHI. In order to prevent this problem this patch modifies the register_fhi_callback so that request_irq for FHI gets called only after CPU specific callback has been registered with the driver. Bug 200319716 Bug 1814444 Bug 200409183 Bug 200409194 Change-Id: Ieb4f32d6c1d3835be7e8ff6f30dd7247d4036412 Signed-off-by: Rohit Khanna <rokhanna@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1705784 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
The handler function can be invoked right after request_irq
gets called. If FHI is triggered before CPU specific
FHI handler is registered, there will be no
one to clear the FHI.

In order to prevent this problem this patch modifies the
register_fhi_callback so that request_irq for FHI
gets called only after CPU specific
callback has been registered with the driver.

Bug 200319716
Bug 1814444
Bug 200409183
Bug 200409194

Change-Id: Ieb4f32d6c1d3835be7e8ff6f30dd7247d4036412
Signed-off-by: Rohit Khanna <rokhanna@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1705784
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
arm64: ras: Disable FHI used for Correctable Err 2018-02-08T05:24:09+00:00 Rohit Khanna rokhanna@nvidia.com 2018-02-06T02:41:33+00:00 467876f99ec546451a681f424f6b645c1a50b199 MTS currently desnt have support for fielding Correctable Errors. Thus this patch disables enabling the FHI during arm64_ras probe. Bug 200319716 Bug 1814444 Change-Id: I2ffd5eff318e0d16efc0563f727411888b3ace16 Signed-off-by: Rohit Khanna <rokhanna@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1653001 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
MTS currently desnt have support for fielding Correctable Errors.
Thus this patch disables enabling the FHI during arm64_ras probe.

Bug 200319716
Bug 1814444

Change-Id: I2ffd5eff318e0d16efc0563f727411888b3ace16
Signed-off-by: Rohit Khanna <rokhanna@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1653001
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
ras: set initcall level to arch_initcall 2017-12-05T17:13:15+00:00 Rohit Khanna rokhanna@nvidia.com 2017-11-16T21:59:45+00:00 453f895c76292445e8e100145b55423250f27622 Set initcall levels for arm64_ras and carmel_ras to arch_initcall instead of module_init. This will allow the driver to catch and report errors early during boot, before all the device drivers are init. Bug 1814444 Bug 200319716 Change-Id: I75e61546ac7824473b2410c115205ddff51b130a Signed-off-by: Rohit Khanna <rokhanna@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1607511 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
Set initcall levels for arm64_ras and carmel_ras to
arch_initcall instead of module_init. This will allow
the driver to catch and report errors early during boot,
before all the device drivers are init.

Bug 1814444
Bug 200319716

Change-Id: I75e61546ac7824473b2410c115205ddff51b130a
Signed-off-by: Rohit Khanna <rokhanna@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1607511
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
ras: add arm64_ras driver 2017-11-08T02:00:55+00:00 Rohit Khanna rokhanna@nvidia.com 2017-02-22T21:42:07+00:00 09153e17a136ca2842b637b8b49629241144ef5d Add a driver to handle MCA/RAS errors. The driver allows you to handle Correctable errors using FHI or Fault Handling Interrupt. The driver provides an API for CPU sepcific RAS drivers to register callbacks in case of FHI. When FHI occurs, the FHI ISR goes through the list of registered callbacks and executes them. Bug 1814444 Bug 200319716 Change-Id: I9cd14466ae9e3672807e1a21637503800ab2b657 Signed-off-by: Rohit Khanna <rokhanna@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1258400 GVS: Gerrit_Virtual_Submit Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
Add a driver to handle MCA/RAS errors.

The driver allows you to handle Correctable errors using FHI
or Fault Handling Interrupt.

The driver provides an API for CPU sepcific RAS drivers to
register callbacks in case of FHI. When FHI occurs, the FHI
ISR goes through the list of registered callbacks and executes
them.

Bug 1814444
Bug 200319716

Change-Id: I9cd14466ae9e3672807e1a21637503800ab2b657
Signed-off-by: Rohit Khanna <rokhanna@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1258400
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>