nvidia-tegra-modules.git/drivers/platform, branch gpu-paging NVIDIA's kernel modules to support tegra chips (used in Jetson boards) platform: tegra: mc: add option to disable L3 alloc hint from mss nvlink 2022-02-02T20:10:57+00:00 Brad Griffis bgriffis@nvidia.com 2022-02-01T00:29:03+00:00 70c252977fc080c829b195fece6f46f73586f1e4 Accessing memory beyond 64GB boundary from GPU on Xavier needs L3 cache alloc hint disabled at mss nvlink. Bug 3486025 Change-Id: Iac3a8932a6877b371df15d3e0d8dc9ebe1e48bdd Signed-off-by: Brad Griffis <bgriffis@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2662169 Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> GVS: Gerrit_Virtual_Submit 
Accessing memory beyond 64GB boundary from GPU on Xavier needs L3 cache
alloc hint disabled at mss nvlink.

Bug 3486025

Change-Id: Iac3a8932a6877b371df15d3e0d8dc9ebe1e48bdd
Signed-off-by: Brad Griffis <bgriffis@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2662169
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
GVS: Gerrit_Virtual_Submit
tegra: cache: fix dcache flush retry 2022-02-02T14:24:20+00:00 ADIGUPTA adigupta@nvidia.com 2021-10-25T09:37:23+00:00 61b6f004d9893c90a4d61fe35878948844cfe9e3 Presently we have number of retries as 10 to flush cache, each flush operation takes around 95-100 us Increased number of retries to 20, and enabled debug version of flush code which profiles latency, executing the flush instruction. Bug 200782744 Change-Id: Ie32c17bacdb9d091e9e21a8384727a6479d83b47 Signed-off-by: Aditya Gupta <adigupta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2648815 Reviewed-by: svcacv <svcacv@nvidia.com> Reviewed-by: Rohit Upadhyay <rupadhyay@nvidia.com> GVS: Gerrit_Virtual_Submit 
Presently we have number of retries as 10 to flush cache,
each flush operation takes around 95-100 us

Increased number of retries to 20, and
enabled debug version of flush code which
profiles latency, executing the flush instruction.

Bug 200782744

Change-Id: Ie32c17bacdb9d091e9e21a8384727a6479d83b47
Signed-off-by: Aditya Gupta <adigupta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2648815
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Rohit Upadhyay <rupadhyay@nvidia.com>
GVS: Gerrit_Virtual_Submit
nvadsp: Add more error logs and fix crash 2022-01-24T16:40:08+00:00 Uday Gupta udayg@nvidia.com 2021-09-12T11:15:19+00:00 0b4dd54af468cc6a74f042c6ea93a2f4c9864a4e - Change adds more error logs in case of APP init failure. - Also potentially fixes the crash issue Bug 3374437 Bug 3498407 Change-Id: If6baf6e2e11250815cff4a6b8a2abe553e893e34 Signed-off-by: Uday Gupta <udayg@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2593021 (cherry picked from commit b051fae2faffafbffed99b94914bbd9bc370240f) Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2658565 Reviewed-by: Dipesh Gandhi <dipeshg@nvidia.com> Reviewed-by: Phoenix Jung <pjung@nvidia.com> GVS: Gerrit_Virtual_Submit 
- Change adds more error logs in case of APP init failure.
- Also potentially fixes the crash issue

Bug 3374437
Bug 3498407

Change-Id: If6baf6e2e11250815cff4a6b8a2abe553e893e34
Signed-off-by: Uday Gupta <udayg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2593021
(cherry picked from commit b051fae2faffafbffed99b94914bbd9bc370240f)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2658565
Reviewed-by: Dipesh Gandhi <dipeshg@nvidia.com>
Reviewed-by: Phoenix Jung <pjung@nvidia.com>
GVS: Gerrit_Virtual_Submit
tegra: mc: Restore value of nvlink registers on resume 2021-12-21T03:25:36+00:00 Ketan Patil ketanp@nvidia.com 2021-12-15T05:15:03+00:00 df16cbaaabd67d8e52a802fa77c60a44e03ad15d NvLink registers are not getting restored after suspend resume. Restore these registers during resume. Bug 3418979 Change-Id: I8dff27d03c43df61d1a2c64e1aa77e0cec926645 Signed-off-by: Ketan Patil <ketanp@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2642340 (cherry picked from commit eb0b8117551011bbde82f8ef3504e36160c9ece3) Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2642845 Reviewed-by: Sachin Nikam <snikam@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit 
NvLink registers are not getting restored after suspend resume. Restore
these registers during resume.

Bug 3418979

Change-Id: I8dff27d03c43df61d1a2c64e1aa77e0cec926645
Signed-off-by: Ketan Patil <ketanp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2642340
(cherry picked from commit eb0b8117551011bbde82f8ef3504e36160c9ece3)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2642845
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
tegra: mc: Add resume function for mc 2021-12-10T15:54:20+00:00 Ketan Patil ketanp@nvidia.com 2021-11-09T14:14:14+00:00 34d8735fb9bdab04a7cfaee566f60341b659a911 mc_err is not reported after device resume as MC_INTMASK register is in reset state. Restore this register in resume. Bug 3418979 Change-Id: I04884b81164a4b95e1f11e6e78e35499b6f5e977 Signed-off-by: Ketan Patil <ketanp@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2622984 (cherry picked from commit c9638f54e8b3dc48158cce548c24bae6dbf09adc) Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2638812 Reviewed-by: svcacv <svcacv@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com> Reviewed-by: Puneet Saxena <puneets@nvidia.com> Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
mc_err is not reported after device resume as MC_INTMASK register is in
reset state. Restore this register in resume.

Bug 3418979

Change-Id: I04884b81164a4b95e1f11e6e78e35499b6f5e977
Signed-off-by: Ketan Patil <ketanp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2622984
(cherry picked from commit c9638f54e8b3dc48158cce548c24bae6dbf09adc)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2638812
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
hv-net: add more debug prints 2021-08-13T20:10:40+00:00 Achal Verma achalv@nvidia.com 2021-04-19T06:06:23+00:00 8ba41706ccb86f8f2a0a0cee8d86cf0957c58733 Bug 3283221 Change-Id: I038834db630c6751f03f8c1114ba9b9181fa2201 Signed-off-by: Achal Verma <achalv@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2516881 Reviewed-by: Dmitry Pervushin <dpervushin@nvidia.com> Reviewed-by: Rahul Jain (SW-TEGRA) <rahuljain@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2575307 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Phoenix Jung <pjung@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> 
Bug 3283221 

Change-Id: I038834db630c6751f03f8c1114ba9b9181fa2201
Signed-off-by: Achal Verma <achalv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2516881
Reviewed-by: Dmitry Pervushin <dpervushin@nvidia.com>
Reviewed-by: Rahul Jain (SW-TEGRA) <rahuljain@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2575307
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Phoenix Jung <pjung@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
tegra: safety: fix error print in HB 2021-07-15T13:41:30+00:00 Karthik Mantravadi mkarthik@nvidia.com 2021-07-14T10:48:47+00:00 1dc88d956450c0e79a82272f7a037d297097ef4b In case of HB success, the print should be info instead of err. Bug 200750061 Change-Id: Idbb020a745ed792aa4a1af5d40fcdb318b631651 Signed-off-by: Karthik Mantravadi <mkarthik@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2558916 Reviewed-by: svcacv <svcacv@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
In case of HB success, the print should be info
instead of err.

Bug 200750061

Change-Id: Idbb020a745ed792aa4a1af5d40fcdb318b631651
Signed-off-by: Karthik Mantravadi <mkarthik@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2558916
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
tegra: safety: Phase notification command 2021-07-01T22:54:13+00:00 Mantravadi Karthik mkarthik@nvidia.com 2021-06-10T08:44:50+00:00 4f6bc7b5a7fe5ceb1a7200e5752746a63eb0bb31 Why? SCE HB working starts with Init done phase notification from CCPLEX. How? The init done phase notification is scheduled at the end of safety-ivc drver probe as all the necessary items for l1ss are initialized by then. Bug 200700400 Change-Id: I18cb66b2cbe6c3184c9c23c9b7ee6f6c53f62c06 Signed-off-by: Mantravadi Karthik <mkarthik@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2542621 Reviewed-by: Preetham Chandru <pchandru@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit 
Why?
SCE HB working starts with Init done phase
notification from CCPLEX.

How?
The init done phase notification is scheduled at
the end of safety-ivc drver probe as all the
necessary items for l1ss are initialized by then.

Bug 200700400

Change-Id: I18cb66b2cbe6c3184c9c23c9b7ee6f6c53f62c06
Signed-off-by: Mantravadi Karthik <mkarthik@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2542621
Reviewed-by: Preetham Chandru <pchandru@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
tegra: safety: FuSa State notification command 2021-06-07T20:09:28+00:00 Preetham Chandru Ramchandra pchandru@nvidia.com 2021-06-01T11:02:55+00:00 8e22b81c5c85985ba3238f67919c201ebc8f456a Add support for CMDRESP_FUSA_STATE_NOTIFICATION command. This command will be sent from L2SS to L1SS when FuSa (Functional Safety) Manager's state changes. Bug 200700404 Change-Id: Ice986c17adf809f1eaf2dd7131aa70a5e67f9d1a Signed-off-by: Preetham Chandru Ramchandra <pchandru@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2537820 Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
Add support for CMDRESP_FUSA_STATE_NOTIFICATION command.
This command will be sent from L2SS to L1SS when FuSa (Functional
Safety) Manager's state changes.

Bug 200700404

Change-Id: Ice986c17adf809f1eaf2dd7131aa70a5e67f9d1a
Signed-off-by: Preetham Chandru Ramchandra <pchandru@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2537820
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
tegra: safety-ivc: Add support for HB CMD 2021-06-02T20:39:07+00:00 Mantravadi Karthik mkarthik@nvidia.com 2021-05-20T17:19:26+00:00 d9ca6d86e9a96e966a111ff1edd421c095b14ffa Why? L2SS expects a heartbeat ping every 40ms. CCPLEX is expected to write the Boot status in the IVC channel for the first time and the consective pings will be just to send Alive check. How? Create a new callback API for the HB command which fills the bit fields for the HB data and sends it over the cmd-resp IVC channel. * Added mutex lock support for l1ss_cmd_resp_send_frame for syncronizing the ivc writes. * Waiting for empty interrupts hogs the system. Time critical features such as HB fail while waiting for empty interrupts. Hence, removing the HSP SM empty isr support. Bug 200700400 Change-Id: I7f124c9f7336df9d387536aa3f2dda80d9234db8 Signed-off-by: Mantravadi Karthik <mkarthik@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2519655 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> 
Why?
L2SS expects a heartbeat ping every 40ms. CCPLEX is
expected to write the Boot status in the IVC channel
for the first time and the consective pings will be
just to send Alive check.

How?
Create a new callback API for the HB command which
fills the bit fields for the HB data and sends it over
the cmd-resp IVC channel.

* Added mutex lock support for l1ss_cmd_resp_send_frame
  for syncronizing the ivc writes.
* Waiting for empty interrupts hogs the system. Time
  critical features such as HB fail while waiting for
  empty interrupts. Hence, removing the HSP SM empty isr
  support.

Bug 200700400

Change-Id: I7f124c9f7336df9d387536aa3f2dda80d9234db8
Signed-off-by: Mantravadi Karthik <mkarthik@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2519655
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>