nvidia-tegra-modules.git/drivers/pci, branch gpu-paging NVIDIA's kernel modules to support tegra chips (used in Jetson boards) PCI: tegra: Add support to enable slot regulators in EP mode 2021-07-09T11:55:02+00:00 Vidya Sagar vidyas@nvidia.com 2021-07-07T07:08:41+00:00 977a8e0ba630dfb6af09efa05b2b2196dc3074b2 Add support to enable slot supplies in the EP mode of operation. This change is required if any converter is connected to the PCIe slot (whose owner is actually operating in the endpoint mode) and is expecting power from the slot. Ex:- In McCoy platform, the miniSAS converter card that gets connected to the PCIe slot owned by C5 controller expects power from the slot. Bug 200614753 Change-Id: Ic83902bb142f7acc0a39ce2deea7794d731c4bbd Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2555163 Reviewed-by: Manikanta Maddireddy <mmaddireddy@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
Add support to enable slot supplies in the EP mode of operation.
This change is required if any converter is connected to the PCIe slot
(whose owner is actually operating in the endpoint mode) and is expecting
power from the slot.
Ex:- In McCoy platform, the miniSAS converter card that gets connected
to the PCIe slot owned by C5 controller expects power from the slot.

Bug 200614753

Change-Id: Ic83902bb142f7acc0a39ce2deea7794d731c4bbd
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2555163
Reviewed-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
PCI: tegra: Add support for SRNS configuration 2021-07-09T11:54:52+00:00 Vidya Sagar vidyas@nvidia.com 2021-07-06T15:54:41+00:00 ee00245e6913b0d5118c1e5b8831a2af57bd41e3 Add support to enable controllers to work in an SRNS clocking scheme in both RP and EP modes. Bug 200614753 Change-Id: Ib70c458bd930c9f8b887c4e70c26ad5eb0c1dff4 Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2555162 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: svcacv <svcacv@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit 
Add support to enable controllers to work in an SRNS clocking scheme in
both RP and EP modes.

Bug 200614753

Change-Id: Ib70c458bd930c9f8b887c4e70c26ad5eb0c1dff4
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2555162
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
PCI: tegra: Add 100 msec delay after enabling slot regulators 2021-07-05T17:55:24+00:00 Manikanta Maddireddy mmaddireddy@nvidia.com 2021-06-25T09:29:34+00:00 6f6d64a3ac32e2058cbe6a66a2c8e1f9eb60ebde According to PCI Express Card Electromechanical Specification Revision 1.1, Table-2.4, T_PVPERL (Power stable to PERST# inactive) should be a minimum of 100ms. Bug 200513636 Change-Id: I23ca552c7bfdd3cbf0d583c5fd04ea9065113e0c Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2549856 Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: Aaron Tian <atian@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
According to PCI Express Card Electromechanical Specification
Revision 1.1, Table-2.4, T_PVPERL (Power stable to PERST# inactive)
should be a minimum of 100ms.

Bug 200513636

Change-Id: I23ca552c7bfdd3cbf0d583c5fd04ea9065113e0c
Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2549856
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Aaron Tian <atian@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
PCI: tegra: Refactor slot regulator code 2021-07-05T17:55:02+00:00 Vidya Sagar vidyas@nvidia.com 2019-05-14T11:58:29+00:00 b952a21ae793e9bd5ae76f7b14fa77308a679c22 Not all platforms need to have platform regulators for the PCIe slot owned by C5 controller and hence instead of bailing out completely log the absence of slot regulators as an information and move ahead thereby avoiding unnecessary error logs. Bug 2594431 Bug 200513636 Change-Id: I990c2c1f9874f714da56104bfe2ca7a5c6b2b631 Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2118608 (cherry picked from commit 12901d8246f4d6a4b232ba9bf2b918340fef89aa) Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2549263 Reviewed-by: svcacv <svcacv@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: Aaron Tian <atian@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
Not all platforms need to have platform regulators for the PCIe slot
owned by C5 controller and hence instead of bailing out completely
log the absence of slot regulators as an information and move ahead
thereby avoiding unnecessary error logs.

Bug 2594431
Bug 200513636

Change-Id: I990c2c1f9874f714da56104bfe2ca7a5c6b2b631
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2118608
(cherry picked from commit 12901d8246f4d6a4b232ba9bf2b918340fef89aa)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2549263
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Aaron Tian <atian@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
PCI: tegra: Use regulator framework to enable 3v3 & 12v 2021-07-05T17:54:57+00:00 Vidya Sagar vidyas@nvidia.com 2019-04-24T09:24:37+00:00 fb81ebd2a4eede02fea37664d62e50a20cdcbeab Use regulator framework to enable 3v3 and 12v supplies to PCIe slot than directly using GPIO controls Bug 200513636 Change-Id: I84519a8a951a01135329f84955ce8c5f27e0e092 Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2108567 (cherry picked from commit ad171ebd6e02efef7c2232a6b9564d0a07e2bd07) Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2549262 Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: Aaron Tian <atian@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
Use regulator framework to enable 3v3 and 12v supplies to PCIe slot
than directly using GPIO controls

Bug 200513636

Change-Id: I84519a8a951a01135329f84955ce8c5f27e0e092
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2108567
(cherry picked from commit ad171ebd6e02efef7c2232a6b9564d0a07e2bd07)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2549262
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Aaron Tian <atian@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
PCI: tegra: Add 100ms delay after enabling slot regulators 2021-04-30T12:54:58+00:00 Vidya Sagar vidyas@nvidia.com 2020-05-14T13:03:27+00:00 0b22f5e30cd04060d2eaf0f2566e850628fea8b9 According to PCI Express Card Electromechanical Specification Revision 1.1 Table-2.4, T_PVPERL (Power stable to PERST# inactive) should be a minimum of 100ms. This patch adds this 100ms delay. Bug 2958308 Change-Id: Ie86438c9daa3daf5cf0a60a553b1e1dc919059de Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2344083 Tested-by: Om Prakash Singh <omp@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: Om Prakash Singh <omp@nvidia.com> Reviewed-by: Vijay Mali <vmali@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit 
According to PCI Express Card Electromechanical Specification Revision 1.1
Table-2.4, T_PVPERL (Power stable to PERST# inactive) should be a minimum
of 100ms. This patch adds this 100ms delay.

Bug 2958308

Change-Id: Ie86438c9daa3daf5cf0a60a553b1e1dc919059de
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2344083
Tested-by: Om Prakash Singh <omp@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Om Prakash Singh <omp@nvidia.com>
Reviewed-by: Vijay Mali <vmali@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
PCI: tegra: Don't allow suspend when Tegra PCIe is in EP mode 2021-04-16T19:55:09+00:00 Om Prakash Singh omp@nvidia.com 2021-04-01T11:20:50+00:00 dbfc138f5ef308675071acde3678cbc6d2d2d2b4 When Tegra PCIe is in endpoint mode it should be available for root port. PCIe link up by root port fails if it is in suspend state. So, don't allow Tegra to suspend when endpoint mode is enabled. Bug 200715162 Change-Id: I11f8f0c2f4e293535646147c81f2486791f51dbe Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com> Signed-off-by: Om Prakash Singh <omp@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2509192 Reviewed-by: Vidya Sagar <vidyas@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit 
When Tegra PCIe is in endpoint mode it should be available for root port.
PCIe link up by root port fails if it is in suspend state. So, don't allow
Tegra to suspend when endpoint mode is enabled.

Bug 200715162
Change-Id: I11f8f0c2f4e293535646147c81f2486791f51dbe
Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Signed-off-by: Om Prakash Singh <omp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2509192
Reviewed-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
PCI: tvnet: Add PM support for tvnet driver 2021-02-18T18:10:02+00:00 Manikanta Maddireddy mmaddireddy@nvidia.com 2021-01-12T16:48:04+00:00 7d3a870268c697064c9f437e34122151be559478 Add PM support to enable suspend to RAM support for Tegra virtual Ethernet over PCIe in RP system. Bug 3216243 Change-Id: I39e023c6c890699b082f6761dd2955b19659da16 Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2469498 Reviewed-by: Vidya Sagar <vidyas@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit 
Add PM support to enable suspend to RAM support for Tegra virtual Ethernet
over PCIe in RP system.

Bug 3216243

Change-Id: I39e023c6c890699b082f6761dd2955b19659da16
Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2469498
Reviewed-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
PCI: tegra: Fix a typo in IO_BASE register programming 2020-11-18T10:38:44+00:00 Vidya Sagar vidyas@nvidia.com 2020-11-13T10:10:57+00:00 5e7cc4f5791e68bfb34c76133123f6e31f5c5bdd Fix a typo to replace duplicate entry of IO_BASE_IO_DECODE with IO_BASE_IO_DECODE_BIT8. Bug 200391637 Bug 2074569 Change-Id: Ia5f390d24fe02cde5ada2f9deabf353b341e60a0 Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2445894 (cherry picked from commit 19617983ad71e4e932171fd0a8bdc440753f9e1c) Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2447341 Reviewed-by: automaticguardword <automaticguardword@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
Fix a typo to replace duplicate entry of IO_BASE_IO_DECODE with
IO_BASE_IO_DECODE_BIT8.

Bug 200391637
Bug 2074569

Change-Id: Ia5f390d24fe02cde5ada2f9deabf353b341e60a0
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2445894
(cherry picked from commit 19617983ad71e4e932171fd0a8bdc440753f9e1c)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2447341
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
PCI: tvnet: fix memory barrier usage 2020-04-13T19:39:01+00:00 Om Prakash Singh omp@nvidia.com 2020-04-13T06:39:39+00:00 28f161a7886c439db5c19d60fb0f02a09e89c8ae replace smp_mb() memory barrier with mb() to take care of IO and Memory access synchronization as well. Bug 200600954 Change-Id: I2526c1b972166f241339e25f5ae8722a8d532bd6 Signed-off-by: Om Prakash Singh <omp@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2327768 Reviewed-by: automaticguardword <automaticguardword@nvidia.com> Reviewed-by: Manikanta Maddireddy <mmaddireddy@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit 
replace smp_mb() memory barrier with mb() to take care of IO and
Memory access synchronization as well.

Bug 200600954

Change-Id: I2526c1b972166f241339e25f5ae8722a8d532bd6
Signed-off-by: Om Prakash Singh <omp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvidia/+/2327768
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit