nvidia-tegra-modules.git/drivers/clocksource/tegra186_timer.c, branch rtss22-ae NVIDIA's kernel modules to support tegra chips (used in Jetson boards) clocksource: timer: t186: add timer suspend hook 2018-11-19T19:14:04+00:00 sumitg sumitg@nvidia.com 2018-10-15T10:19:42+00:00 914676a522ed0b8acc0cde8018a311c024ae648f Adding syscore suspend hook to disable timer for boot core and function to enable irq on boot core during resume. Also, clearing interrupts after disabling timer on all cores. Change is done to fix scenario where SC7 entry fails due to unserviced interrupt if the timer interrupt is generated after disabling local irq delivery on boot core and before doing SC7 entry check in ATF as an interrupt is pending to be serviced. During suspend, disabling timer on boot core will stop any new timer interrupt. And clearing timer interrupts after disabling timer on all cores will make sure no interrupt is pending before checking SC7 entry. Bug 2241914 Change-Id: I86dff69c52ea300f5cce873f8ba96909b478f5de Signed-off-by: sumitg <sumitg@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1950654 (cherry picked from commit 223db81591e953c11391d580b2c9aa234c74818c) Reviewed-on: https://git-master.nvidia.com/r/1952102 GVS: Gerrit_Virtual_Submit Reviewed-by: Leon Yu <leoyu@nvidia.com> Tested-by: Leon Yu <leoyu@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
Adding syscore suspend hook to disable timer for boot core
and function to enable irq on boot core during resume.
Also, clearing interrupts after disabling timer on all cores.
Change is done to fix scenario where SC7 entry fails due
to unserviced interrupt if the timer interrupt is generated
after disabling local irq delivery on boot core and before
doing SC7 entry check in ATF as an interrupt is pending to
be serviced.
During suspend, disabling timer on boot core will stop any
new timer interrupt. And clearing timer interrupts after
disabling timer on all cores will make sure no interrupt
is pending before checking SC7 entry.

Bug 2241914

Change-Id: I86dff69c52ea300f5cce873f8ba96909b478f5de
Signed-off-by: sumitg <sumitg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1950654
(cherry picked from commit 223db81591e953c11391d580b2c9aa234c74818c)
Reviewed-on: https://git-master.nvidia.com/r/1952102
GVS: Gerrit_Virtual_Submit
Reviewed-by: Leon Yu <leoyu@nvidia.com>
Tested-by: Leon Yu <leoyu@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
drivers: linsim removal 2017-07-27T01:56:25+00:00 William Pierce wpierce@nvidia.com 2017-05-18T00:43:24+00:00 3b7a87170b7cc2216e28be2765d40ec89d1284f6 Removed multiple tegra_platform_is_linsim if statements because of linsim deprecation. Bug 1903831 Change-Id: I53f882a9700532e912da19eff83b0e91ba2526be Signed-off-by: William Pierce <wpierce@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1523447 Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com> Reviewed-by: Ujwal Patel <ujwalp@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> 
Removed multiple tegra_platform_is_linsim if statements because of
linsim deprecation.

Bug 1903831

Change-Id: I53f882a9700532e912da19eff83b0e91ba2526be
Signed-off-by: William Pierce <wpierce@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1523447
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
Reviewed-by: Ujwal Patel <ujwalp@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
clocksource: t186: remove unbalanced of_node_put 2017-05-24T09:34:40+00:00 Timo Alho talho@nvidia.com 2017-05-23T07:27:19+00:00 9453e92813332d50e2b1fdf5188be67c76f2223c Remove unbalanced of_node_put from tegra186 clocksource driver. Bug 1904474 Change-Id: I1e17b11d2256c187fe69eab16e7172a5c5ad8ff1 Signed-off-by: Timo Alho <talho@nvidia.com> Reviewed-on: http://git-master/r/1487662 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com> Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com> GVS: Gerrit_Virtual_Submit 
Remove unbalanced of_node_put from tegra186 clocksource driver.

Bug 1904474

Change-Id: I1e17b11d2256c187fe69eab16e7172a5c5ad8ff1
Signed-off-by: Timo Alho <talho@nvidia.com>
Reviewed-on: http://git-master/r/1487662
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
GVS: Gerrit_Virtual_Submit
timer: add support for tegra timer 2017-04-20T11:14:07+00:00 Aniruddha Banerjee aniruddhab@nvidia.com 2017-02-15T19:38:14+00:00 b55391992558a1ff7a56b7ade730b63fdf977867 This patch adds support for the tegra timer in the new cpu hotplug framework. Bug 1859909 Change-Id: I5350cded87db80024084a3d39bbf6ea0942550ee Signed-off-by: Aniruddha Banerjee <aniruddhab@nvidia.com> Reviewed-on: http://git-master/r/1305597 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Antti Miettinen <amiettinen@nvidia.com> Tested-by: Antti Miettinen <amiettinen@nvidia.com> Reviewed-by: Timo Alho <talho@nvidia.com> 
This patch adds support for the tegra timer in the new cpu hotplug
framework.

Bug 1859909

Change-Id: I5350cded87db80024084a3d39bbf6ea0942550ee
Signed-off-by: Aniruddha Banerjee <aniruddhab@nvidia.com>
Reviewed-on: http://git-master/r/1305597
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Antti Miettinen <amiettinen@nvidia.com>
Tested-by: Antti Miettinen <amiettinen@nvidia.com>
Reviewed-by: Timo Alho <talho@nvidia.com>
t18x: drivers: use soc/tegra/chip-id.h for soc header 2017-01-21T11:16:10+00:00 Shardar Shariff Md smohammed@nvidia.com 2017-01-20T19:24:50+00:00 d7b4f880d46ee1d65c2a8a73b32d3f8a04cc21e0 The soc tegra headers are unified and moved all the content of linux/tegra-soc.h to the soc/tegra/chip-id.h to have the single soc header for Tegra. Change-Id: I67a95258775e50add4ab9872e4525910b14ff99c Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com> Reviewed-on: http://git-master/r/1291661 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> 
The soc tegra headers are unified and moved all the content of
linux/tegra-soc.h to the soc/tegra/chip-id.h to have the
single soc header for Tegra.

Change-Id: I67a95258775e50add4ab9872e4525910b14ff99c
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/1291661
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
clockevents: migrate to new 'set-state' interface 2016-04-11T23:24:50+00:00 Alex Van Brunt avanbrunt@nvidia.com 2016-04-11T18:28:17+00:00 53c78b0175487c2806f412e878b5c37d9967dbcf Migrate the tegra186 to the new 'set-state' interface provided by the clockevents core. Allow the driver to compile against the old 'set-mode' interface as well. Change-Id: I9ea63c8357e15dd279a955c529f104ba505d0ad2 Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com> Reviewed-on: http://git-master/r/1123775 GVS: Gerrit_Virtual_Submit 
Migrate the tegra186 to the new 'set-state' interface provided by the
clockevents core. Allow the driver to compile against the old 'set-mode'
interface as well.

Change-Id: I9ea63c8357e15dd279a955c529f104ba505d0ad2
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
Reviewed-on: http://git-master/r/1123775
GVS: Gerrit_Virtual_Submit
clocksource: timers: restore timers after sc7 2015-11-25T16:46:54+00:00 Prashant Gaikwad pgaikwad@nvidia.com 2015-11-19T19:34:20+00:00 cb5defc071ee255d4b7807723a56293c4d92c64e Timers lose context in SC7. Reprogram interrupt map and clock source in system resume. Bug 200138959 Change-Id: I94a2777357cd36fa12764fcd60dac4a5f2e426c7 Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Reviewed-on: http://git-master/r/835428 (cherry picked from commit ced8a570b626e782522515dc738f950a2092767e) Reviewed-on: http://git-master/r/837140 GVS: Gerrit_Virtual_Submit Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com> 
Timers lose context in SC7. Reprogram interrupt map
and clock source in system resume.

Bug 200138959

Change-Id: I94a2777357cd36fa12764fcd60dac4a5f2e426c7
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-on: http://git-master/r/835428
(cherry picked from commit ced8a570b626e782522515dc738f950a2092767e)
Reviewed-on: http://git-master/r/837140
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
clocksource: update tegra18 clocksource to use OSC 2015-11-19T16:28:32+00:00 Alex Van Brunt avanbrunt@nvidia.com 2015-11-02T23:04:19+00:00 152449b4123aacabe13b51e4ca21ada0ce7bd014 The TSC is used to clock the bus for the TKE. Therefore it cannot be halted while debugging because any access will hang. However, the TKE needs to stop the timers durring debug. The solution is to keep the TSC running but use OSC to driver the timers and then to halt the timer in debug. This patch switches the timers to use OSC instead of TSC as the time source. The clk "osc" is not available at the time that the timer registers itself. This is because tegra186-clocks is registered later. Therefore, this driver must rely on the frequency in the device-tree for OSC. Bug 1702499 Change-Id: I33dc31c82c2e42aed5490ad94d139b05341e516e Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com> Reviewed-on: http://git-master/r/826464 Reviewed-by: Jinyoung Park <jinyoungp@nvidia.com> Tested-by: Jinyoung Park <jinyoungp@nvidia.com> GVS: Gerrit_Virtual_Submit 
The TSC is used to clock the bus for the TKE. Therefore it cannot be halted
while debugging because any access will hang. However, the TKE needs to
stop the timers durring debug.

The solution is to keep the TSC running but use OSC to driver the timers
and then to halt the timer in debug. This patch switches the timers to use
OSC instead of TSC as the time source.

The clk "osc" is not available at the time that the timer registers itself.
This is because tegra186-clocks is registered later. Therefore, this driver
must rely on the frequency in the device-tree for OSC.

Bug 1702499

Change-Id: I33dc31c82c2e42aed5490ad94d139b05341e516e
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
Reviewed-on: http://git-master/r/826464
Reviewed-by: Jinyoung Park <jinyoungp@nvidia.com>
Tested-by: Jinyoung Park <jinyoungp@nvidia.com>
GVS: Gerrit_Virtual_Submit
t18x: clocksource: Update timer interrupt for cpu resume 2015-10-02T23:21:38+00:00 Krishna Sitaraman ksitaraman@nvidia.com 2015-09-21T22:47:13+00:00 bd4732b9f6677df71f39405b0364fa13c7a737c9 Upon cpu resume/onlining enable timer interrupt. Also make the interrupt percpu. Change-Id: I39cd20ee26fc04417ccace99dc109be788acf97b Signed-off-by: Krishna Sitaraman <ksitaraman@nvidia.com> Reviewed-on: http://git-master/r/802480 Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com> Reviewed-by: Sai Gurrappadi <sgurrappadi@nvidia.com> 
Upon cpu resume/onlining enable timer interrupt. Also make
the interrupt percpu.

Change-Id: I39cd20ee26fc04417ccace99dc109be788acf97b
Signed-off-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Reviewed-on: http://git-master/r/802480
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
Reviewed-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
clocksource: tegra18 clocksource 2015-09-29T18:10:43+00:00 Alex Van Brunt avanbrunt@nvidia.com 2015-08-11T18:33:47+00:00 fcbe15704e82b6d541194a825ca9be3a69ba4b58 Add a driver for the TMR / TKE module. This timer is outside of the CPUs. That allows it to continue running while the CPU os powered off. bug 1674769 Change-Id: I5bb0f2b9d60fb49e64a19dadc62b1decb1753078 Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com> Reviewed-on: http://git-master/r/795345 Reviewed-by: Richard Wiley <rwiley@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-on: http://git-master/r/783905 
Add a driver for the TMR / TKE module. This timer is outside of the
CPUs. That allows it to continue running while the CPU os powered off.

bug 1674769

Change-Id: I5bb0f2b9d60fb49e64a19dadc62b1decb1753078
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
Reviewed-on: http://git-master/r/795345
Reviewed-by: Richard Wiley <rwiley@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-on: http://git-master/r/783905