nvidia-tegra-modules.git/Documentation/devicetree/bindings/l3_cache, branch gpu-paging NVIDIA's kernel modules to support tegra chips (used in Jetson boards) t194: cache: l3 cache 2017-08-29T10:39:43+00:00 Puneet Saxena puneets@nvidia.com 2017-07-14T12:27:04+00:00 7d3f574690ff81b257e31f935970d913b9955396 It adds ioctl to get gpu_cpu_ways, gpu_only_ways. It sets gpu_l3_ways(max) and gpu_l3_only_ways(min) to program l3 cache. It exposes debugfs nodes to set/get - - gpu_cpu_ways - gpu_only_ways It also exposes debugfs node to get - - total_ways - L3 cache size Bug 200324092 Change-Id: Ibef7484be30041825ff2324791c9455e4e70bd4d Signed-off-by: Puneet Saxena <puneets@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1520534 Reviewed-by: Sachin Nikam <snikam@nvidia.com> 
It adds ioctl to get  gpu_cpu_ways, gpu_only_ways.
It sets gpu_l3_ways(max) and gpu_l3_only_ways(min)
to program l3 cache.

It exposes debugfs nodes to set/get -
- gpu_cpu_ways
- gpu_only_ways

It also exposes debugfs node to get -
- total_ways
- L3 cache size

Bug 200324092

Change-Id: Ibef7484be30041825ff2324791c9455e4e70bd4d
Signed-off-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1520534
Reviewed-by: Sachin Nikam <snikam@nvidia.com>