1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
|
/*
* Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#include "gk20a/gk20a.h"
#include "pwrdev.h"
#include "pmgrpmu.h"
#ifdef CONFIG_DEBUG_FS
#include <linux/debugfs.h>
#include "common/linux/os_linux.h"
#endif
int pmgr_pwr_devices_get_power(struct gk20a *g, u32 *val)
{
struct nv_pmu_pmgr_pwr_devices_query_payload payload;
int status;
status = pmgr_pmu_pwr_devices_query_blocking(g, 1, &payload);
if (status)
nvgpu_err(g, "pmgr_pwr_devices_get_current_power failed %x",
status);
*val = payload.devices[0].powerm_w;
return status;
}
int pmgr_pwr_devices_get_current(struct gk20a *g, u32 *val)
{
struct nv_pmu_pmgr_pwr_devices_query_payload payload;
int status;
status = pmgr_pmu_pwr_devices_query_blocking(g, 1, &payload);
if (status)
nvgpu_err(g, "pmgr_pwr_devices_get_current failed %x",
status);
*val = payload.devices[0].currentm_a;
return status;
}
int pmgr_pwr_devices_get_voltage(struct gk20a *g, u32 *val)
{
struct nv_pmu_pmgr_pwr_devices_query_payload payload;
int status;
status = pmgr_pmu_pwr_devices_query_blocking(g, 1, &payload);
if (status)
nvgpu_err(g, "pmgr_pwr_devices_get_current_voltage failed %x",
status);
*val = payload.devices[0].voltageu_v;
return status;
}
#ifdef CONFIG_DEBUG_FS
static int pmgr_pwr_devices_get_power_u64(void *data, u64 *p)
{
struct gk20a *g = (struct gk20a *)data;
int err;
u32 val;
err = pmgr_pwr_devices_get_power(g, &val);
*p = val;
return err;
}
static int pmgr_pwr_devices_get_current_u64(void *data, u64 *p)
{
struct gk20a *g = (struct gk20a *)data;
int err;
u32 val;
err = pmgr_pwr_devices_get_current(g, &val);
*p = val;
return err;
}
static int pmgr_pwr_devices_get_voltage_u64(void *data, u64 *p)
{
struct gk20a *g = (struct gk20a *)data;
int err;
u32 val;
err = pmgr_pwr_devices_get_voltage(g, &val);
*p = val;
return err;
}
DEFINE_SIMPLE_ATTRIBUTE(
pmgr_power_ctrl_fops, pmgr_pwr_devices_get_power_u64, NULL, "%llu\n");
DEFINE_SIMPLE_ATTRIBUTE(
pmgr_current_ctrl_fops, pmgr_pwr_devices_get_current_u64, NULL, "%llu\n");
DEFINE_SIMPLE_ATTRIBUTE(
pmgr_voltage_ctrl_fops, pmgr_pwr_devices_get_voltage_u64, NULL, "%llu\n");
static void pmgr_debugfs_init(struct gk20a *g)
{
struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
struct dentry *dbgentry;
dbgentry = debugfs_create_file(
"power", S_IRUGO, l->debugfs, g, &pmgr_power_ctrl_fops);
if (!dbgentry)
nvgpu_err(g, "debugfs entry create failed for power");
dbgentry = debugfs_create_file(
"current", S_IRUGO, l->debugfs, g, &pmgr_current_ctrl_fops);
if (!dbgentry)
nvgpu_err(g, "debugfs entry create failed for current");
dbgentry = debugfs_create_file(
"voltage", S_IRUGO, l->debugfs, g, &pmgr_voltage_ctrl_fops);
if (!dbgentry)
nvgpu_err(g, "debugfs entry create failed for voltage");
}
#endif
u32 pmgr_domain_sw_setup(struct gk20a *g)
{
u32 status;
status = pmgr_device_sw_setup(g);
if (status) {
nvgpu_err(g,
"error creating boardobjgrp for pmgr devices, status - 0x%x",
status);
goto exit;
}
status = pmgr_monitor_sw_setup(g);
if (status) {
nvgpu_err(g,
"error creating boardobjgrp for pmgr monitor, status - 0x%x",
status);
goto exit;
}
status = pmgr_policy_sw_setup(g);
if (status) {
nvgpu_err(g,
"error creating boardobjgrp for pmgr policy, status - 0x%x",
status);
goto exit;
}
#ifdef CONFIG_DEBUG_FS
pmgr_debugfs_init(g);
#endif
exit:
return status;
}
u32 pmgr_domain_pmu_setup(struct gk20a *g)
{
return pmgr_send_pmgr_tables_to_pmu(g);
}
|
