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/*
* Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef __TSG_GK20A_H_
#define __TSG_GK20A_H_
#define NVGPU_INVALID_TSG_ID (-1)
bool gk20a_is_channel_marked_as_tsg(struct channel_gk20a *ch);
int gk20a_tsg_dev_release(struct inode *inode, struct file *filp);
int gk20a_tsg_dev_open(struct inode *inode, struct file *filp);
long gk20a_tsg_dev_ioctl(struct file *filp,
unsigned int cmd, unsigned long arg);
int gk20a_init_tsg_support(struct gk20a *g, u32 tsgid);
int gk20a_bind_runnable_channel_to_tsg(struct channel_gk20a *ch, int tsgid);
int gk20a_unbind_channel_from_tsg(struct channel_gk20a *ch, int tsgid);
struct tsg_gk20a {
struct gk20a *g;
bool in_use;
int tsgid;
struct list_head ch_runnable_list;
int num_runnable_channels;
struct mutex ch_list_lock;
};
#endif /* __TSG_GK20A_H_ */
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