1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
|
/*
* Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <linux/nvhost.h>
#include <linux/nvhost_ioctl.h>
#include <linux/of_platform.h>
#include <nvgpu/nvhost.h>
#include "nvhost_priv.h"
#include "gk20a/gk20a.h"
int nvgpu_get_nvhost_dev(struct gk20a *g)
{
struct device_node *np = g->dev->of_node;
struct platform_device *host1x_pdev = NULL;
const __be32 *host1x_ptr;
host1x_ptr = of_get_property(np, "nvidia,host1x", NULL);
if (host1x_ptr) {
struct device_node *host1x_node =
of_find_node_by_phandle(be32_to_cpup(host1x_ptr));
host1x_pdev = of_find_device_by_node(host1x_node);
if (!host1x_pdev) {
nvgpu_warn(g, "host1x device not available");
return -EPROBE_DEFER;
}
} else {
if (g->has_syncpoints) {
nvgpu_warn(g, "host1x reference not found. assuming no syncpoints support");
g->has_syncpoints = false;
}
return 0;
}
g->nvhost_dev = nvgpu_kzalloc(g, sizeof(struct nvgpu_nvhost_dev));
if (!g->nvhost_dev)
return -ENOMEM;
g->nvhost_dev->host1x_pdev = host1x_pdev;
return 0;
}
void nvgpu_free_nvhost_dev(struct gk20a *g)
{
nvgpu_kfree(g, g->nvhost_dev);
}
int nvgpu_nvhost_module_busy_ext(
struct nvgpu_nvhost_dev *nvhost_dev)
{
return nvhost_module_busy_ext(nvhost_dev->host1x_pdev);
}
void nvgpu_nvhost_module_idle_ext(
struct nvgpu_nvhost_dev *nvhost_dev)
{
nvhost_module_idle_ext(nvhost_dev->host1x_pdev);
}
void nvgpu_nvhost_debug_dump_device(
struct nvgpu_nvhost_dev *nvhost_dev)
{
nvhost_debug_dump_device(nvhost_dev->host1x_pdev);
}
const char *nvgpu_nvhost_syncpt_get_name(
struct nvgpu_nvhost_dev *nvhost_dev, int id)
{
return nvhost_syncpt_get_name(nvhost_dev->host1x_pdev, id);
}
bool nvgpu_nvhost_syncpt_is_valid_pt_ext(
struct nvgpu_nvhost_dev *nvhost_dev, u32 id)
{
return nvhost_syncpt_is_valid_pt_ext(nvhost_dev->host1x_pdev, id);
}
int nvgpu_nvhost_syncpt_is_expired_ext(
struct nvgpu_nvhost_dev *nvhost_dev, u32 id, u32 thresh)
{
return nvhost_syncpt_is_expired_ext(nvhost_dev->host1x_pdev,
id, thresh);
}
u32 nvgpu_nvhost_syncpt_incr_max_ext(
struct nvgpu_nvhost_dev *nvhost_dev, u32 id, u32 incrs)
{
return nvhost_syncpt_incr_max_ext(nvhost_dev->host1x_pdev, id, incrs);
}
int nvgpu_nvhost_intr_register_notifier(
struct nvgpu_nvhost_dev *nvhost_dev, u32 id, u32 thresh,
void (*callback)(void *, int), void *private_data)
{
return nvhost_intr_register_notifier(nvhost_dev->host1x_pdev,
id, thresh,
callback, private_data);
}
void nvgpu_nvhost_syncpt_set_min_eq_max_ext(
struct nvgpu_nvhost_dev *nvhost_dev, u32 id)
{
nvhost_syncpt_set_min_eq_max_ext(nvhost_dev->host1x_pdev, id);
}
void nvgpu_nvhost_syncpt_put_ref_ext(
struct nvgpu_nvhost_dev *nvhost_dev, u32 id)
{
nvhost_syncpt_put_ref_ext(nvhost_dev->host1x_pdev, id);
}
u32 nvgpu_nvhost_get_syncpt_host_managed(
struct nvgpu_nvhost_dev *nvhost_dev,
u32 param, const char *syncpt_name)
{
return nvhost_get_syncpt_host_managed(nvhost_dev->host1x_pdev,
param, syncpt_name);
}
int nvgpu_nvhost_syncpt_wait_timeout_ext(
struct nvgpu_nvhost_dev *nvhost_dev, u32 id,
u32 thresh, u32 timeout, u32 *value, struct timespec *ts)
{
return nvhost_syncpt_wait_timeout_ext(nvhost_dev->host1x_pdev,
id, thresh, timeout, value, ts);
}
int nvgpu_nvhost_syncpt_read_ext_check(
struct nvgpu_nvhost_dev *nvhost_dev, u32 id, u32 *val)
{
return nvhost_syncpt_read_ext_check(nvhost_dev->host1x_pdev, id, val);
}
int nvgpu_nvhost_create_symlink(struct gk20a *g)
{
struct device *dev = g->dev;
int err = 0;
if (g->nvhost_dev &&
(dev->parent != &g->nvhost_dev->host1x_pdev->dev)) {
err = sysfs_create_link(&g->nvhost_dev->host1x_pdev->dev.kobj,
&dev->kobj,
dev_name(dev));
}
return err;
}
void nvgpu_nvhost_remove_symlink(struct gk20a *g)
{
struct device *dev = g->dev;
if (g->nvhost_dev &&
(dev->parent != &g->nvhost_dev->host1x_pdev->dev)) {
sysfs_remove_link(&g->nvhost_dev->host1x_pdev->dev.kobj,
dev_name(dev));
}
}
#ifdef CONFIG_SYNC
u32 nvgpu_nvhost_sync_pt_id(struct sync_pt *pt)
{
return nvhost_sync_pt_id(pt);
}
u32 nvgpu_nvhost_sync_pt_thresh(struct sync_pt *pt)
{
return nvhost_sync_pt_thresh(pt);
}
struct sync_fence *nvgpu_nvhost_sync_fdget(int fd)
{
return nvhost_sync_fdget(fd);
}
int nvgpu_nvhost_sync_num_pts(struct sync_fence *fence)
{
return nvhost_sync_num_pts(fence);
}
struct sync_fence *nvgpu_nvhost_sync_create_fence(
struct nvgpu_nvhost_dev *nvhost_dev,
u32 id, u32 thresh,
u32 num_pts, const char *name)
{
struct nvhost_ctrl_sync_fence_info pt = {
.id = id,
.thresh = thresh,
};
return nvhost_sync_create_fence(nvhost_dev->host1x_pdev, &pt, num_pts, name);
}
#endif /* CONFIG_SYNC */
|
