/* * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, * version 2, as published by the Free Software Foundation. * * This program is distributed in the hope it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License * along with this program. If not, see . */ /* * Function naming determines intended use: * * _r(void) : Returns the offset for register . * * _o(void) : Returns the offset for element . * * _w(void) : Returns the word offset for word (4 byte) element . * * __s(void) : Returns size of field of register in bits. * * __f(u32 v) : Returns a value based on 'v' which has been shifted * and masked to place it at field of register . This value * can be |'d with others to produce a full register value for * register . * * __m(void) : Returns a mask for field of register . This * value can be ~'d and then &'d to clear the value of field for * register . * * ___f(void) : Returns the constant value after being shifted * to place it at field of register . This value can be |'d * with others to produce a full register value for . * * __v(u32 r) : Returns the value of field from a full register * value 'r' after being shifted to place its LSB at bit 0. * This value is suitable for direct comparison with other unshifted * values appropriate for use in field of register . * * ___v(void) : Returns the constant value for defined for * field of register . This value is suitable for direct * comparison with unshifted values appropriate for use in field * of register . */ #ifndef _hw_perf_gv11b_h_ #define _hw_perf_gv11b_h_ static inline u32 perf_pmasys_control_r(void) { return 0x0024a000; } static inline u32 perf_pmasys_control_membuf_status_v(u32 r) { return (r >> 4) & 0x1; } static inline u32 perf_pmasys_control_membuf_status_overflowed_v(void) { return 0x00000001; } static inline u32 perf_pmasys_control_membuf_status_overflowed_f(void) { return 0x10; } static inline u32 perf_pmasys_control_membuf_clear_status_f(u32 v) { return (v & 0x1) << 5; } static inline u32 perf_pmasys_control_membuf_clear_status_v(u32 r) { return (r >> 5) & 0x1; } static inline u32 perf_pmasys_control_membuf_clear_status_doit_v(void) { return 0x00000001; } static inline u32 perf_pmasys_control_membuf_clear_status_doit_f(void) { return 0x20; } static inline u32 perf_pmasys_mem_block_r(void) { return 0x0024a070; } static inline u32 perf_pmasys_mem_block_base_f(u32 v) { return (v & 0xfffffff) << 0; } static inline u32 perf_pmasys_mem_block_target_f(u32 v) { return (v & 0x3) << 28; } static inline u32 perf_pmasys_mem_block_target_v(u32 r) { return (r >> 28) & 0x3; } static inline u32 perf_pmasys_mem_block_target_lfb_v(void) { return 0x00000000; } static inline u32 perf_pmasys_mem_block_target_lfb_f(void) { return 0x0; } static inline u32 perf_pmasys_mem_block_target_sys_coh_v(void) { return 0x00000002; } static inline u32 perf_pmasys_mem_block_target_sys_coh_f(void) { return 0x20000000; } static inline u32 perf_pmasys_mem_block_target_sys_ncoh_v(void) { return 0x00000003; } static inline u32 perf_pmasys_mem_block_target_sys_ncoh_f(void) { return 0x30000000; } static inline u32 perf_pmasys_mem_block_valid_f(u32 v) { return (v & 0x1) << 31; } static inline u32 perf_pmasys_mem_block_valid_v(u32 r) { return (r >> 31) & 0x1; } static inline u32 perf_pmasys_mem_block_valid_true_v(void) { return 0x00000001; } static inline u32 perf_pmasys_mem_block_valid_true_f(void) { return 0x80000000; } static inline u32 perf_pmasys_mem_block_valid_false_v(void) { return 0x00000000; } static inline u32 perf_pmasys_mem_block_valid_false_f(void) { return 0x0; } static inline u32 perf_pmasys_outbase_r(void) { return 0x0024a074; } static inline u32 perf_pmasys_outbase_ptr_f(u32 v) { return (v & 0x7ffffff) << 5; } static inline u32 perf_pmasys_outbaseupper_r(void) { return 0x0024a078; } static inline u32 perf_pmasys_outbaseupper_ptr_f(u32 v) { return (v & 0xff) << 0; } static inline u32 perf_pmasys_outsize_r(void) { return 0x0024a07c; } static inline u32 perf_pmasys_outsize_numbytes_f(u32 v) { return (v & 0x7ffffff) << 5; } static inline u32 perf_pmasys_mem_bytes_r(void) { return 0x0024a084; } static inline u32 perf_pmasys_mem_bytes_numbytes_f(u32 v) { return (v & 0xfffffff) << 4; } static inline u32 perf_pmasys_mem_bump_r(void) { return 0x0024a088; } static inline u32 perf_pmasys_mem_bump_numbytes_f(u32 v) { return (v & 0xfffffff) << 4; } static inline u32 perf_pmasys_enginestatus_r(void) { return 0x0024a0a4; } static inline u32 perf_pmasys_enginestatus_rbufempty_f(u32 v) { return (v & 0x1) << 4; } static inline u32 perf_pmasys_enginestatus_rbufempty_empty_v(void) { return 0x00000001; } static inline u32 perf_pmasys_enginestatus_rbufempty_empty_f(void) { return 0x10; } #endif