/*
 * Copyright (c) 2014-2018, NVIDIA CORPORATION.  All rights reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 *
 * This file is autogenerated.  Do not edit.
 */

#include <nvgpu/types.h>
#include <nvgpu/io.h>
#include <nvgpu/enabled.h>

#include "gating_reglist.h"
#include "gv100_gating_reglist.h"

#define GATING_DESC_SIZE (u32)(sizeof(struct gating_desc))

/* slcg bus */
static const struct gating_desc gv100_slcg_bus[] = {
	{.addr = 0x00001c04U, .prod = 0x00000000U, .disable = 0x000003feU},
};

/* slcg ce2 */
static const struct gating_desc gv100_slcg_ce2[] = {
	{.addr = 0x00104204U, .prod = 0x00000040U, .disable = 0x000007feU},
};

/* slcg chiplet */
static const struct gating_desc gv100_slcg_chiplet[] = {
	{.addr = 0x0010c07cU, .prod = 0x00000000U, .disable = 0x00000007U},
	{.addr = 0x0010c17cU, .prod = 0x00000000U, .disable = 0x00000007U},
	{.addr = 0x0010c27cU, .prod = 0x00000000U, .disable = 0x00000007U},
	{.addr = 0x0010c37cU, .prod = 0x00000000U, .disable = 0x00000007U},
	{.addr = 0x0010c47cU, .prod = 0x00000000U, .disable = 0x00000007U},
	{.addr = 0x0010c57cU, .prod = 0x00000000U, .disable = 0x00000007U},
	{.addr = 0x0010e07cU, .prod = 0x00000000U, .disable = 0x00000007U},
	{.addr = 0x0010d07cU, .prod = 0x00000000U, .disable = 0x00000007U},
	{.addr = 0x0010d17cU, .prod = 0x00000000U, .disable = 0x00000007U},
	{.addr = 0x0010d27cU, .prod = 0x00000000U, .disable = 0x00000007U},
	{.addr = 0x0010d37cU, .prod = 0x00000000U, .disable = 0x00000007U},
	{.addr = 0x0010d47cU, .prod = 0x00000000U, .disable = 0x00000007U},
	{.addr = 0x0010d57cU, .prod = 0x00000000U, .disable = 0x00000007U},
	/* fix priv error */
	/*{.addr = 0x0010d67cU, .prod = 0x00000000U, .disable = 0x00000007U},*/
	/*{.addr = 0x0010d77cU, .prod = 0x00000000U, .disable = 0x00000007U},*/
	{.addr = 0x0010e17cU, .prod = 0x00000000U, .disable = 0x00000007U},
};

/* slcg fb */
static const struct gating_desc gv100_slcg_fb[] = {
	{.addr = 0x00100d14U, .prod = 0x00000020U, .disable = 0xfffffffeU},
	{.addr = 0x00100c9cU, .prod = 0x00000000U, .disable = 0x000001feU},
	{.addr = 0x001facb4U, .prod = 0x00000000U, .disable = 0x000001feU},
};

/* slcg fifo */
static const struct gating_desc gv100_slcg_fifo[] = {
	{.addr = 0x000026ecU, .prod = 0x00000000U, .disable = 0x0001fffeU},
};

/* slcg gr */
static const struct gating_desc gv100_slcg_gr[] = {
	{.addr = 0x004041f4U, .prod = 0x00000000U, .disable = 0x07fffffeU},
	{.addr = 0x0040917cU, .prod = 0x00020008U, .disable = 0x0003fffeU},
	{.addr = 0x00409894U, .prod = 0x00000000U, .disable = 0x0000fffeU},
	{.addr = 0x004078c4U, .prod = 0x00000000U, .disable = 0x000001feU},
	{.addr = 0x00406004U, .prod = 0x00000200U, .disable = 0x0001fffeU},
	{.addr = 0x00405864U, .prod = 0x00000000U, .disable = 0x000001feU},
	{.addr = 0x00405910U, .prod = 0xfffffff0U, .disable = 0xfffffffeU},
	{.addr = 0x00408044U, .prod = 0x00000000U, .disable = 0x000007feU},
	{.addr = 0x00407004U, .prod = 0x00000000U, .disable = 0x000001feU},
	{.addr = 0x00405bf4U, .prod = 0x00000000U, .disable = 0x00000002U},
	{.addr = 0x0041a17cU, .prod = 0x00020008U, .disable = 0x0003fffeU},
	{.addr = 0x0041a894U, .prod = 0x00000000U, .disable = 0x0000fffeU},
	{.addr = 0x00418504U, .prod = 0x00000000U, .disable = 0x0007fffeU},
	{.addr = 0x0041860cU, .prod = 0x00000000U, .disable = 0x000001feU},
	{.addr = 0x0041868cU, .prod = 0x00000000U, .disable = 0x0000001eU},
	{.addr = 0x0041871cU, .prod = 0x00000000U, .disable = 0x000003feU},
	{.addr = 0x00418388U, .prod = 0x00000000U, .disable = 0x00000001U},
	{.addr = 0x0041882cU, .prod = 0x00000000U, .disable = 0x0001fffeU},
	{.addr = 0x00418bc0U, .prod = 0x00000000U, .disable = 0x000001feU},
	{.addr = 0x00418974U, .prod = 0x00000000U, .disable = 0x0001fffeU},
	{.addr = 0x00418c74U, .prod = 0xffffff80U, .disable = 0xfffffffeU},
	{.addr = 0x00418cf4U, .prod = 0xfffffff8U, .disable = 0xfffffffeU},
	{.addr = 0x00418d74U, .prod = 0xffffffe0U, .disable = 0xfffffffeU},
	{.addr = 0x00418f10U, .prod = 0xffffffe0U, .disable = 0xfffffffeU},
	{.addr = 0x00418e10U, .prod = 0xfffffffeU, .disable = 0xfffffffeU},
	{.addr = 0x00419024U, .prod = 0x000001feU, .disable = 0x000001feU},
	{.addr = 0x0041889cU, .prod = 0x00000000U, .disable = 0x000001feU},
	{.addr = 0x00419d24U, .prod = 0x00000000U, .disable = 0x000000ffU},
	{.addr = 0x0041986cU, .prod = 0x00000104U, .disable = 0x00fffffeU},
	{.addr = 0x00419c74U, .prod = 0x0000001eU, .disable = 0x0000001eU},
	/* fix priv error */
	/*{.addr = 0x00419c84U, .prod = 0x0003fffeU, .disable = 0x0003fffeU},*/
	{.addr = 0x00419c8cU, .prod = 0xffffff84U, .disable = 0xfffffffeU},
	{.addr = 0x00419c94U, .prod = 0x00000240U, .disable = 0x00007ffeU},
	{.addr = 0x00419ca4U, .prod = 0x00003ffeU, .disable = 0x00003ffeU},
	{.addr = 0x00419cacU, .prod = 0x0001fffeU, .disable = 0x0001fffeU},
	{.addr = 0x00419a44U, .prod = 0x00000008U, .disable = 0x0000000eU},
	{.addr = 0x00419a4cU, .prod = 0x000001f8U, .disable = 0x000001feU},
	{.addr = 0x00419a54U, .prod = 0x0000003cU, .disable = 0x0000003eU},
	{.addr = 0x00419a5cU, .prod = 0x0000000cU, .disable = 0x0000000eU},
	{.addr = 0x00419a64U, .prod = 0x00000186U, .disable = 0x000001feU},
	{.addr = 0x00419a7cU, .prod = 0x0000003cU, .disable = 0x0000003eU},
	{.addr = 0x00419a84U, .prod = 0x0000000cU, .disable = 0x0000000eU},
	{.addr = 0x0041be2cU, .prod = 0x04115fc0U, .disable = 0xfffffffeU},
	{.addr = 0x0041bfecU, .prod = 0xfffffff0U, .disable = 0xfffffffeU},
	{.addr = 0x0041bed4U, .prod = 0xfffffff8U, .disable = 0xfffffffeU},
	{.addr = 0x00412814U, .prod = 0x00000000U, .disable = 0x0001fffeU},
	{.addr = 0x00412a84U, .prod = 0x00000000U, .disable = 0x0001fffeU},
	{.addr = 0x004129acU, .prod = 0x00000000U, .disable = 0x0001fffeU},
	{.addr = 0x00412a24U, .prod = 0x00000000U, .disable = 0x000000ffU},
	{.addr = 0x00412c14U, .prod = 0x00000000U, .disable = 0x0001fffeU},
	{.addr = 0x00412e84U, .prod = 0x00000000U, .disable = 0x0001fffeU},
	{.addr = 0x00412dacU, .prod = 0x00000000U, .disable = 0x0001fffeU},
	{.addr = 0x00412e24U, .prod = 0x00000000U, .disable = 0x000000ffU},
	/* fix priv error */
	/*{.addr = 0x00413014U, .prod = 0x00000000U, .disable = 0x0001fffeU},*/
	/*{.addr = 0x00413284U, .prod = 0x00000000U, .disable = 0x0001fffeU},*/
	/*{.addr = 0x004131acU, .prod = 0x00000000U, .disable = 0x0001fffeU},*/
	/*{.addr = 0x00413224U, .prod = 0x00000000U, .disable = 0x000000ffU},*/
	/*{.addr = 0x00413414U, .prod = 0x00000000U, .disable = 0x0001fffeU},*/
	/*{.addr = 0x00413684U, .prod = 0x00000000U, .disable = 0x0001fffeU},*/
	/*{.addr = 0x004135acU, .prod = 0x00000000U, .disable = 0x0001fffeU},*/
	/*{.addr = 0x00413624U, .prod = 0x00000000U, .disable = 0x000000ffU},*/
	/*{.addr = 0x00413814U, .prod = 0x00000000U, .disable = 0x0001fffeU},*/
	/*{.addr = 0x00413a84U, .prod = 0x00000000U, .disable = 0x0001fffeU},*/
	/*{.addr = 0x004139acU, .prod = 0x00000000U, .disable = 0x0001fffeU},*/
	/*{.addr = 0x00413a24U, .prod = 0x00000000U, .disable = 0x000000ffU},*/
	/*{.addr = 0x00413c14U, .prod = 0x00000000U, .disable = 0x0001fffeU},*/
	/*{.addr = 0x00413e84U, .prod = 0x00000000U, .disable = 0x0001fffeU},*/
	/*{.addr = 0x00413dacU, .prod = 0x00000000U, .disable = 0x0001fffeU},*/
	/*{.addr = 0x00413e24U, .prod = 0x00000000U, .disable = 0x000000ffU},*/
	{.addr = 0x00408814U, .prod = 0x00000000U, .disable = 0x0001fffeU},
	{.addr = 0x00408a84U, .prod = 0x00000000U, .disable = 0x0001fffeU},
	{.addr = 0x004089acU, .prod = 0x00000000U, .disable = 0x0001fffeU},
	{.addr = 0x00408a24U, .prod = 0x00000000U, .disable = 0x000000ffU},
};

/* slcg ltc */
static const struct gating_desc gv100_slcg_ltc[] = {
	{.addr = 0x00154050U, .prod = 0x00000000U, .disable = 0xfffffffeU},
	{.addr = 0x0015455cU, .prod = 0x00000000U, .disable = 0xfffffffeU},
	{.addr = 0x0015475cU, .prod = 0x00000000U, .disable = 0xfffffffeU},
	{.addr = 0x0015495cU, .prod = 0x00000000U, .disable = 0xfffffffeU},
	{.addr = 0x00154b5cU, .prod = 0x00000000U, .disable = 0xfffffffeU},
	{.addr = 0x0015435cU, .prod = 0x00000000U, .disable = 0xfffffffeU},
	{.addr = 0x00156050U, .prod = 0x00000000U, .disable = 0xfffffffeU},
	{.addr = 0x0015655cU, .prod = 0x00000000U, .disable = 0xfffffffeU},
	{.addr = 0x0015675cU, .prod = 0x00000000U, .disable = 0xfffffffeU},
	{.addr = 0x0015695cU, .prod = 0x00000000U, .disable = 0xfffffffeU},
	{.addr = 0x00156b5cU, .prod = 0x00000000U, .disable = 0xfffffffeU},
	{.addr = 0x0015635cU, .prod = 0x00000000U, .disable = 0xfffffffeU},
	/* fix priv error */
	/*{.addr = 0x00158050U, .prod = 0x00000000U, .disable = 0xfffffffeU},*/
	/*{.addr = 0x0015855cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/
	/*{.addr = 0x0015875cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/
	/*{.addr = 0x0015895cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/
	/*{.addr = 0x00158b5cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/
	/*{.addr = 0x0015835cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/
	/*{.addr = 0x0015a050U, .prod = 0x00000000U, .disable = 0xfffffffeU},*/
	/*{.addr = 0x0015a55cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/
	/*{.addr = 0x0015a75cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/
	/*{.addr = 0x0015a95cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/
	/*{.addr = 0x0015ab5cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/
	/*{.addr = 0x0015a35cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/
	/*{.addr = 0x0015c050U, .prod = 0x00000000U, .disable = 0xfffffffeU},*/
	/*{.addr = 0x0015c55cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/
	/*{.addr = 0x0015c75cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/
	/*{.addr = 0x0015c95cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/
	/*{.addr = 0x0015cb5cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/
	/*{.addr = 0x0015c35cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/
	/*{.addr = 0x0015e050U, .prod = 0x00000000U, .disable = 0xfffffffeU},*/
	/*{.addr = 0x0015e55cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/
	/*{.addr = 0x0015e75cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/
	/*{.addr = 0x0015e95cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/
	/*{.addr = 0x0015eb5cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/
	/*{.addr = 0x0015e35cU, .prod = 0x00000000U, .disable = 0xfffffffeU},*/
	{.addr = 0x0017e050U, .prod = 0x00000000U, .disable = 0xfffffffeU},
	{.addr = 0x0017e35cU, .prod = 0x00000000U, .disable = 0xfffffffeU},
};

/* slcg perf */
static const struct gating_desc gv100_slcg_perf[] = {
	{.addr = 0x00248018U, .prod = 0xffffffffU, .disable = 0x00000000U},
	{.addr = 0x00248018U, .prod = 0xffffffffU, .disable = 0x00000000U},
	{.addr = 0x00246018U, .prod = 0xffffffffU, .disable = 0x00000000U},
	{.addr = 0x00246218U, .prod = 0xffffffffU, .disable = 0x00000000U},
	{.addr = 0x00246418U, .prod = 0xffffffffU, .disable = 0x00000000U},
	{.addr = 0x00246618U, .prod = 0xffffffffU, .disable = 0x00000000U},
	{.addr = 0x00246818U, .prod = 0xffffffffU, .disable = 0x00000000U},
	{.addr = 0x00246a18U, .prod = 0xffffffffU, .disable = 0x00000000U},
	/* fix priv error */
	/*{.addr = 0x00246c18U, .prod = 0xffffffffU, .disable = 0x00000000U},*/
	/*{.addr = 0x00246e18U, .prod = 0xffffffffU, .disable = 0x00000000U},*/
	{.addr = 0x00246018U, .prod = 0xffffffffU, .disable = 0x00000000U},
	{.addr = 0x00246218U, .prod = 0xffffffffU, .disable = 0x00000000U},
	{.addr = 0x00246418U, .prod = 0xffffffffU, .disable = 0x00000000U},
	{.addr = 0x00246618U, .prod = 0xffffffffU, .disable = 0x00000000U},
	{.addr = 0x00246818U, .prod = 0xffffffffU, .disable = 0x00000000U},
	{.addr = 0x00246a18U, .prod = 0xffffffffU, .disable = 0x00000000U},
	/* fix priv error */
	/*{.addr = 0x00246c18U, .prod = 0xffffffffU, .disable = 0x00000000U},*/
	/*{.addr = 0x00246e18U, .prod = 0xffffffffU, .disable = 0x00000000U},*/
	{.addr = 0x00244018U, .prod = 0xffffffffU, .disable = 0x00000000U},
	{.addr = 0x00244218U, .prod = 0xffffffffU, .disable = 0x00000000U},
	{.addr = 0x00244418U, .prod = 0xffffffffU, .disable = 0x00000000U},
	{.addr = 0x00244618U, .prod = 0xffffffffU, .disable = 0x00000000U},
	{.addr = 0x00244818U, .prod = 0xffffffffU, .disable = 0x00000000U},
	{.addr = 0x00244a18U, .prod = 0xffffffffU, .disable = 0x00000000U},
	{.addr = 0x00244018U, .prod = 0xffffffffU, .disable = 0x00000000U},
	{.addr = 0x00244218U, .prod = 0xffffffffU, .disable = 0x00000000U},
	{.addr = 0x00244418U, .prod = 0xffffffffU, .disable = 0x00000000U},
	{.addr = 0x00244618U, .prod = 0xffffffffU, .disable = 0x00000000U},
	{.addr = 0x00244818U, .prod = 0xffffffffU, .disable = 0x00000000U},
	{.addr = 0x00244a18U, .prod = 0xffffffffU, .disable = 0x00000000U},
	{.addr = 0x0024a124U, .prod = 0x00000001U, .disable = 0x00000000U},
};

/* slcg PriRing */
static const struct gating_desc gv100_slcg_priring[] = {
	{.addr = 0x001200a8U, .prod = 0x00000000U, .disable = 0x00000001U},
};

/* slcg pwr_csb */
static const struct gating_desc gv100_slcg_pwr_csb[] = {
	{.addr = 0x00000134U, .prod = 0x00020008U, .disable = 0x0003fffeU},
	{.addr = 0x00000e74U, .prod = 0x00000000U, .disable = 0x0000000fU},
	{.addr = 0x00000a74U, .prod = 0x00000000U, .disable = 0x00007ffeU},
	{.addr = 0x000016b8U, .prod = 0x00000008U, .disable = 0x0000000fU},
};

/* slcg pmu */
static const struct gating_desc gv100_slcg_pmu[] = {
	{.addr = 0x0010a134U, .prod = 0x00020008U, .disable = 0x0003fffeU},
	{.addr = 0x0010aa74U, .prod = 0x00000000U, .disable = 0x00007ffeU},
	{.addr = 0x0010ae74U, .prod = 0x00000000U, .disable = 0x0000000fU},
};

/* therm gr */
static const struct gating_desc gv100_slcg_therm[] = {
	{.addr = 0x000206b8U, .prod = 0x00000008U, .disable = 0x0000000fU},
};

/* slcg Xbar */
static const struct gating_desc gv100_slcg_xbar[] = {
	{.addr = 0x0013c824U, .prod = 0x00000000U, .disable = 0x7ffffffeU},
	{.addr = 0x0013dc08U, .prod = 0x00000000U, .disable = 0xfffffffeU},
	{.addr = 0x0013c924U, .prod = 0x00000000U, .disable = 0x7ffffffeU},
	{.addr = 0x0013cbe4U, .prod = 0x00000000U, .disable = 0x1ffffffeU},
	{.addr = 0x0013cc04U, .prod = 0x00000000U, .disable = 0x1ffffffeU},
	{.addr = 0x0013cc24U, .prod = 0x00000000U, .disable = 0x1ffffffeU},
	{.addr = 0x0013cc44U, .prod = 0x00000000U, .disable = 0x1ffffffeU},
	{.addr = 0x0013cc64U, .prod = 0x00000000U, .disable = 0x1ffffffeU},
	{.addr = 0x0013cc84U, .prod = 0x00000000U, .disable = 0x1ffffffeU},
	{.addr = 0x0013cca4U, .prod = 0x00000000U, .disable = 0x1ffffffeU},
};

/* blcg bus */
static const struct gating_desc gv100_blcg_bus[] = {
	{.addr = 0x00001c00U, .prod = 0x00000042U, .disable = 0x00000000U},
};

/* blcg ce */
static const struct gating_desc gv100_blcg_ce[] = {
	{.addr = 0x00104200U, .prod = 0x0000c242U, .disable = 0x00000000U},
};

/* blcg ctxsw prog */
static const struct gating_desc gv100_blcg_ctxsw_prog[] = {
};

/* blcg fb */
static const struct gating_desc gv100_blcg_fb[] = {
	{.addr = 0x00100d10U, .prod = 0x0000c242U, .disable = 0x00000000U},
	{.addr = 0x00100d30U, .prod = 0x0000c242U, .disable = 0x00000000U},
	{.addr = 0x00100d3cU, .prod = 0x00000242U, .disable = 0x00000000U},
	{.addr = 0x00100d48U, .prod = 0x0000c242U, .disable = 0x00000000U},
	{.addr = 0x00100d1cU, .prod = 0x00000042U, .disable = 0x00000000U},
	{.addr = 0x00100c98U, .prod = 0x00004242U, .disable = 0x00000000U},
	{.addr = 0x001facb0U, .prod = 0x00004242U, .disable = 0x00000000U},
};

/* blcg fifo */
static const struct gating_desc gv100_blcg_fifo[] = {
	{.addr = 0x000026e0U, .prod = 0x0000c242U, .disable = 0x00000000U},
};

/* blcg gr */
static const struct gating_desc gv100_blcg_gr[] = {
	{.addr = 0x004041f0U, .prod = 0x0000c646U, .disable = 0x00000000U},
	{.addr = 0x00409890U, .prod = 0x0000007fU, .disable = 0x00000000U},
	{.addr = 0x004098b0U, .prod = 0x0000007fU, .disable = 0x00000000U},
	{.addr = 0x004078c0U, .prod = 0x00004242U, .disable = 0x00000000U},
	{.addr = 0x00406000U, .prod = 0x0000c444U, .disable = 0x00000000U},
	{.addr = 0x00405860U, .prod = 0x0000c242U, .disable = 0x00000000U},
	{.addr = 0x0040590cU, .prod = 0x0000c444U, .disable = 0x00000000U},
	{.addr = 0x00408040U, .prod = 0x0000c444U, .disable = 0x00000000U},
	{.addr = 0x00407000U, .prod = 0x4000c242U, .disable = 0x00000000U},
	{.addr = 0x00405bf0U, .prod = 0x0000c444U, .disable = 0x00000000U},
	{.addr = 0x0041a890U, .prod = 0x0000427fU, .disable = 0x00000000U},
	{.addr = 0x0041a8b0U, .prod = 0x0000007fU, .disable = 0x00000000U},
	{.addr = 0x00418500U, .prod = 0x0000c244U, .disable = 0x00000000U},
	{.addr = 0x00418608U, .prod = 0x0000c242U, .disable = 0x00000000U},
	{.addr = 0x00418688U, .prod = 0x0000c242U, .disable = 0x00000000U},
	{.addr = 0x00418718U, .prod = 0x00000042U, .disable = 0x00000000U},
	{.addr = 0x00418828U, .prod = 0x00008444U, .disable = 0x00000000U},
	{.addr = 0x00418bbcU, .prod = 0x0000c242U, .disable = 0x00000000U},
	{.addr = 0x00418970U, .prod = 0x0000c242U, .disable = 0x00000000U},
	{.addr = 0x00418c70U, .prod = 0x0000c444U, .disable = 0x00000000U},
	{.addr = 0x00418cf0U, .prod = 0x0000c444U, .disable = 0x00000000U},
	{.addr = 0x00418d70U, .prod = 0x0000c444U, .disable = 0x00000000U},
	{.addr = 0x00418f0cU, .prod = 0x0000c444U, .disable = 0x00000000U},
	{.addr = 0x00418e0cU, .prod = 0x0000c444U, .disable = 0x00000000U},
	{.addr = 0x00419020U, .prod = 0x0000c242U, .disable = 0x00000000U},
	{.addr = 0x00419038U, .prod = 0x00000042U, .disable = 0x00000000U},
	{.addr = 0x00418898U, .prod = 0x00004242U, .disable = 0x00000000U},
	{.addr = 0x00419868U, .prod = 0x00008243U, .disable = 0x00000000U},
	{.addr = 0x00419c70U, .prod = 0x0000c444U, .disable = 0x00000000U},
	{.addr = 0x00419c80U, .prod = 0x00004048U, .disable = 0x00000000U},
	{.addr = 0x00419c88U, .prod = 0x00004048U, .disable = 0x00000000U},
	{.addr = 0x00419c90U, .prod = 0x0000004aU, .disable = 0x00000000U},
	{.addr = 0x00419c98U, .prod = 0x00000042U, .disable = 0x00000000U},
	{.addr = 0x00419ca0U, .prod = 0x00000043U, .disable = 0x00000000U},
	{.addr = 0x00419ca8U, .prod = 0x00000003U, .disable = 0x00000000U},
	{.addr = 0x00419cb0U, .prod = 0x00000002U, .disable = 0x00000000U},
	{.addr = 0x00419a40U, .prod = 0x00000545U, .disable = 0x00000000U},
	{.addr = 0x00419a48U, .prod = 0x00004545U, .disable = 0x00000000U},
	{.addr = 0x00419a50U, .prod = 0x00004545U, .disable = 0x00000000U},
	{.addr = 0x00419a58U, .prod = 0x00004545U, .disable = 0x00000000U},
	{.addr = 0x00419a60U, .prod = 0x00000505U, .disable = 0x00000000U},
	{.addr = 0x00419a68U, .prod = 0x00000505U, .disable = 0x00000000U},
	{.addr = 0x00419a78U, .prod = 0x00000505U, .disable = 0x00000000U},
	{.addr = 0x00419a80U, .prod = 0x00004545U, .disable = 0x00000000U},
	{.addr = 0x0041be28U, .prod = 0x00008242U, .disable = 0x00000000U},
	{.addr = 0x0041bfe8U, .prod = 0x0000c444U, .disable = 0x00000000U},
	{.addr = 0x0041bed0U, .prod = 0x0000c444U, .disable = 0x00000000U},
	{.addr = 0x00412810U, .prod = 0x0000c242U, .disable = 0x00000000U},
	{.addr = 0x00412a80U, .prod = 0x0000c242U, .disable = 0x00000000U},
	{.addr = 0x004129a8U, .prod = 0x0000c242U, .disable = 0x00000000U},
	{.addr = 0x00412c10U, .prod = 0x0000c242U, .disable = 0x00000000U},
	{.addr = 0x00412e80U, .prod = 0x0000c242U, .disable = 0x00000000U},
	{.addr = 0x00412da8U, .prod = 0x0000c242U, .disable = 0x00000000U},
	/* fix priv error */
	/*{.addr = 0x00413010U, .prod = 0x0000c242U, .disable = 0x00000000U},*/
	/*{.addr = 0x00413280U, .prod = 0x0000c242U, .disable = 0x00000000U},*/
	/*{.addr = 0x004131a8U, .prod = 0x0000c242U, .disable = 0x00000000U},*/
	/*{.addr = 0x00413410U, .prod = 0x0000c242U, .disable = 0x00000000U},*/
	/*{.addr = 0x00413680U, .prod = 0x0000c242U, .disable = 0x00000000U},*/
	/*{.addr = 0x004135a8U, .prod = 0x0000c242U, .disable = 0x00000000U},*/
	/*{.addr = 0x00413810U, .prod = 0x0000c242U, .disable = 0x00000000U},*/
	/*{.addr = 0x00413a80U, .prod = 0x0000c242U, .disable = 0x00000000U},*/
	/*{.addr = 0x004139a8U, .prod = 0x0000c242U, .disable = 0x00000000U},*/
	/*{.addr = 0x00413c10U, .prod = 0x0000c242U, .disable = 0x00000000U},*/
	/*{.addr = 0x00413e80U, .prod = 0x0000c242U, .disable = 0x00000000U},*/
	/*{.addr = 0x00413da8U, .prod = 0x0000c242U, .disable = 0x00000000U},*/
	{.addr = 0x00408810U, .prod = 0x0000c242U, .disable = 0x00000000U},
	{.addr = 0x00408a80U, .prod = 0x0000c242U, .disable = 0x00000000U},
	{.addr = 0x004089a8U, .prod = 0x0000c242U, .disable = 0x00000000U},
};

/* blcg ltc */
static const struct gating_desc gv100_blcg_ltc[] = {
	{.addr = 0x00154030U, .prod = 0x00000044U, .disable = 0x00000000U},
	{.addr = 0x00154040U, .prod = 0x00000044U, .disable = 0x00000000U},
	{.addr = 0x001545e0U, .prod = 0x00000044U, .disable = 0x00000000U},
	{.addr = 0x001545c8U, .prod = 0x00000044U, .disable = 0x00000000U},
	{.addr = 0x001547e0U, .prod = 0x00000044U, .disable = 0x00000000U},
	{.addr = 0x001547c8U, .prod = 0x00000044U, .disable = 0x00000000U},
	{.addr = 0x001549e0U, .prod = 0x00000044U, .disable = 0x00000000U},
	{.addr = 0x001549c8U, .prod = 0x00000044U, .disable = 0x00000000U},
	{.addr = 0x00154be0U, .prod = 0x00000044U, .disable = 0x00000000U},
	{.addr = 0x00154bc8U, .prod = 0x00000044U, .disable = 0x00000000U},
	{.addr = 0x001543e0U, .prod = 0x00000044U, .disable = 0x00000000U},
	{.addr = 0x001543c8U, .prod = 0x00000044U, .disable = 0x00000000U},
	{.addr = 0x00156030U, .prod = 0x00000044U, .disable = 0x00000000U},
	{.addr = 0x00156040U, .prod = 0x00000044U, .disable = 0x00000000U},
	{.addr = 0x001565e0U, .prod = 0x00000044U, .disable = 0x00000000U},
	{.addr = 0x001565c8U, .prod = 0x00000044U, .disable = 0x00000000U},
	{.addr = 0x001567e0U, .prod = 0x00000044U, .disable = 0x00000000U},
	{.addr = 0x001567c8U, .prod = 0x00000044U, .disable = 0x00000000U},
	{.addr = 0x001569e0U, .prod = 0x00000044U, .disable = 0x00000000U},
	{.addr = 0x001569c8U, .prod = 0x00000044U, .disable = 0x00000000U},
	{.addr = 0x00156be0U, .prod = 0x00000044U, .disable = 0x00000000U},
	{.addr = 0x00156bc8U, .prod = 0x00000044U, .disable = 0x00000000U},
	{.addr = 0x001563e0U, .prod = 0x00000044U, .disable = 0x00000000U},
	{.addr = 0x001563c8U, .prod = 0x00000044U, .disable = 0x00000000U},
	/* fix priv error */
	/*{.addr = 0x00158030U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x00158040U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x001585e0U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x001585c8U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x001587e0U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x001587c8U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x001589e0U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x001589c8U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x00158be0U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x00158bc8U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x001583e0U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x001583c8U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x0015a030U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x0015a040U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x0015a5e0U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x0015a5c8U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x0015a7e0U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x0015a7c8U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x0015a9e0U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x0015a9c8U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x0015abe0U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x0015abc8U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x0015a3e0U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x0015a3c8U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x0015c030U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x0015c040U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x0015c5e0U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x0015c5c8U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x0015c7e0U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x0015c7c8U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x0015c9e0U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x0015c9c8U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x0015cbe0U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x0015cbc8U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x0015c3e0U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x0015c3c8U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x0015e030U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x0015e040U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x0015e5e0U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x0015e5c8U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x0015e7e0U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x0015e7c8U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x0015e9e0U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x0015e9c8U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x0015ebe0U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x0015ebc8U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x0015e3e0U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	/*{.addr = 0x0015e3c8U, .prod = 0x00000044U, .disable = 0x00000000U},*/
	{.addr = 0x0017e030U, .prod = 0x00000044U, .disable = 0x00000000U},
	{.addr = 0x0017e040U, .prod = 0x00000044U, .disable = 0x00000000U},
	{.addr = 0x0017e3e0U, .prod = 0x00000044U, .disable = 0x00000000U},
	{.addr = 0x0017e3c8U, .prod = 0x00000044U, .disable = 0x00000000U},
};

/* blcg pwr_csb  */
static const struct gating_desc gv100_blcg_pwr_csb[] = {
	{.addr = 0x00000a70U, .prod = 0x00000045U, .disable = 0x00000000U},
};

/* blcg pmu */
static const struct gating_desc gv100_blcg_pmu[] = {
	{.addr = 0x0010aa70U, .prod = 0x00000045U, .disable = 0x00000000U},
};

/* blcg Xbar */
static const struct gating_desc gv100_blcg_xbar[] = {
	{.addr = 0x0013c820U, .prod = 0x0001004aU, .disable = 0x00000000U},
	{.addr = 0x0013dc04U, .prod = 0x0001004aU, .disable = 0x00000000U},
	{.addr = 0x0013c920U, .prod = 0x0000004aU, .disable = 0x00000000U},
	{.addr = 0x0013cbe0U, .prod = 0x00000042U, .disable = 0x00000000U},
	{.addr = 0x0013cc00U, .prod = 0x00000042U, .disable = 0x00000000U},
	{.addr = 0x0013cc20U, .prod = 0x00000042U, .disable = 0x00000000U},
	{.addr = 0x0013cc40U, .prod = 0x00000042U, .disable = 0x00000000U},
	{.addr = 0x0013cc60U, .prod = 0x00000042U, .disable = 0x00000000U},
	{.addr = 0x0013cc80U, .prod = 0x00000042U, .disable = 0x00000000U},
	{.addr = 0x0013cca0U, .prod = 0x00000042U, .disable = 0x00000000U},
};

/* pg gr */
static const struct gating_desc gv100_pg_gr[] = {
};

/* inline functions */
void gv100_slcg_bus_load_gating_prod(struct gk20a *g,
	bool prod)
{
	u32 i;
	u32 size = (u32)(sizeof(gv100_slcg_bus) / GATING_DESC_SIZE);

	if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) {
		for (i = 0; i < size; i++) {
			u32 reg = gv100_slcg_bus[i].addr;
			u32 val = prod ? gv100_slcg_bus[i].prod :
					gv100_slcg_bus[i].disable;
			gk20a_writel(g, reg, val);
		}
	}
}

void gv100_slcg_ce2_load_gating_prod(struct gk20a *g,
	bool prod)
{
	u32 i;
	u32 size = (u32)(sizeof(gv100_slcg_ce2) / GATING_DESC_SIZE);

	if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) {
		for (i = 0; i < size; i++) {
			u32 reg = gv100_slcg_ce2[i].addr;
			u32 val = prod ? gv100_slcg_ce2[i].prod :
					gv100_slcg_ce2[i].disable;
			gk20a_writel(g, reg, val);
		}
	}
}

void gv100_slcg_chiplet_load_gating_prod(struct gk20a *g,
	bool prod)
{
	u32 i;
	u32 size = (u32)(sizeof(gv100_slcg_chiplet) / GATING_DESC_SIZE);

	if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) {
		for (i = 0; i < size; i++) {
			u32 reg = gv100_slcg_chiplet[i].addr;
			u32 val = prod ? gv100_slcg_chiplet[i].prod :
					gv100_slcg_chiplet[i].disable;
			gk20a_writel(g, reg, val);
		}
	}
}

void gv100_slcg_ctxsw_firmware_load_gating_prod(struct gk20a *g,
	bool prod)
{
	if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) {
	}
}

void gv100_slcg_fb_load_gating_prod(struct gk20a *g,
	bool prod)
{
	u32 i;
	u32 size = (u32)(sizeof(gv100_slcg_fb) / GATING_DESC_SIZE);

	if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) {
		for (i = 0; i < size; i++) {
			u32 reg = gv100_slcg_fb[i].addr;
			u32 val = prod ? gv100_slcg_fb[i].prod :
					gv100_slcg_fb[i].disable;
			gk20a_writel(g, reg, val);
		}
	}
}

void gv100_slcg_fifo_load_gating_prod(struct gk20a *g,
	bool prod)
{
	u32 i;
	u32 size = (u32)(sizeof(gv100_slcg_fifo) / GATING_DESC_SIZE);

	if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) {
		for (i = 0; i < size; i++) {
			u32 reg = gv100_slcg_fifo[i].addr;
			u32 val = prod ? gv100_slcg_fifo[i].prod :
					gv100_slcg_fifo[i].disable;
			gk20a_writel(g, reg, val);
		}
	}
}

void gr_gv100_slcg_gr_load_gating_prod(struct gk20a *g,
	bool prod)
{
	u32 i;
	u32 size = (u32)(sizeof(gv100_slcg_gr) / GATING_DESC_SIZE);

	if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) {
		for (i = 0; i < size; i++) {
			u32 reg = gv100_slcg_gr[i].addr;
			u32 val = prod ? gv100_slcg_gr[i].prod :
					gv100_slcg_gr[i].disable;
			gk20a_writel(g, reg, val);
		}
	}
}

void ltc_gv100_slcg_ltc_load_gating_prod(struct gk20a *g,
	bool prod)
{
	u32 i;
	u32 size = (u32)(sizeof(gv100_slcg_ltc) / GATING_DESC_SIZE);

	if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) {
	for (i = 0; i < size; i++) {
			u32 reg = gv100_slcg_ltc[i].addr;
			u32 val = prod ? gv100_slcg_ltc[i].prod :
					gv100_slcg_ltc[i].disable;
			gk20a_writel(g, reg, val);
		}
	}
}

void gv100_slcg_perf_load_gating_prod(struct gk20a *g,
	bool prod)
{
	u32 i;
	u32 size = (u32)(sizeof(gv100_slcg_perf) / GATING_DESC_SIZE);

	if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) {
		for (i = 0; i < size; i++) {
			u32 reg = gv100_slcg_perf[i].addr;
			u32 val = prod ? gv100_slcg_perf[i].prod :
					 gv100_slcg_perf[i].disable;
			gk20a_writel(g, reg, val);
		}
	}
}

void gv100_slcg_priring_load_gating_prod(struct gk20a *g,
	bool prod)
{
	u32 i;
	u32 size = (u32)(sizeof(gv100_slcg_priring) / GATING_DESC_SIZE);

	if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) {
		for (i = 0; i < size; i++) {
			u32 reg = gv100_slcg_priring[i].addr;
			u32 val = prod ? gv100_slcg_priring[i].prod :
					 gv100_slcg_priring[i].disable;
			gk20a_writel(g, reg, val);
		}
	}
}

void gv100_slcg_pwr_csb_load_gating_prod(struct gk20a *g,
	bool prod)
{
	u32 i;
	u32 size = (u32)(sizeof(gv100_slcg_pwr_csb) / GATING_DESC_SIZE);

	if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) {
		for (i = 0; i < size; i++) {
			u32 reg = gv100_slcg_pwr_csb[i].addr;
			u32 val = prod ? gv100_slcg_pwr_csb[i].prod :
					 gv100_slcg_pwr_csb[i].disable;
			gk20a_writel(g, reg, val);
		}
	}
}

void gv100_slcg_pmu_load_gating_prod(struct gk20a *g,
	bool prod)
{
	u32 i;
	u32 size = (u32)(sizeof(gv100_slcg_pmu) / GATING_DESC_SIZE);

	if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) {
		for (i = 0; i < size; i++) {
			u32 reg = gv100_slcg_pmu[i].addr;
			u32 val = prod ? gv100_slcg_pmu[i].prod :
					 gv100_slcg_pmu[i].disable;
			gk20a_writel(g, reg, val);
		}
	}
}

void gv100_slcg_therm_load_gating_prod(struct gk20a *g,
	bool prod)
{
	u32 i;
	u32 size = (u32)(sizeof(gv100_slcg_therm) / GATING_DESC_SIZE);

	if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) {
		for (i = 0; i < size; i++) {
			u32 reg = gv100_slcg_therm[i].addr;
			u32 val = prod ? gv100_slcg_therm[i].prod :
					 gv100_slcg_therm[i].disable;
			gk20a_writel(g, reg, val);
		}
	}
}

void gv100_slcg_xbar_load_gating_prod(struct gk20a *g,
	bool prod)
{
	u32 i;
	u32 size = (u32)(sizeof(gv100_slcg_xbar) / GATING_DESC_SIZE);

	if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) {
		for (i = 0; i < size; i++) {
			u32 reg = gv100_slcg_xbar[i].addr;
			u32 val = prod ? gv100_slcg_xbar[i].prod :
					 gv100_slcg_xbar[i].disable;
			gk20a_writel(g, reg, val);
		}
	}
}

void gv100_blcg_bus_load_gating_prod(struct gk20a *g,
	bool prod)
{
	u32 i;
	u32 size = (u32)(sizeof(gv100_blcg_bus) / GATING_DESC_SIZE);

	if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) {
		for (i = 0; i < size; i++) {
			u32 reg = gv100_blcg_bus[i].addr;
			u32 val = prod ? gv100_blcg_bus[i].prod :
					 gv100_blcg_bus[i].disable;
			gk20a_writel(g, reg, val);
		}
	}
}

void gv100_blcg_ce_load_gating_prod(struct gk20a *g,
	bool prod)
{
	u32 i;
	u32 size = (u32)(sizeof(gv100_blcg_ce) / GATING_DESC_SIZE);

	if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) {
		for (i = 0; i < size; i++) {
			u32 reg = gv100_blcg_ce[i].addr;
			u32 val = prod ? gv100_blcg_ce[i].prod :
					 gv100_blcg_ce[i].disable;
			gk20a_writel(g, reg, val);
		}
	}
}

void gv100_blcg_ctxsw_firmware_load_gating_prod(struct gk20a *g,
	bool prod)
{
	u32 i;
	u32 size = (u32)(sizeof(gv100_blcg_ctxsw_prog) / GATING_DESC_SIZE);

	if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) {
		for (i = 0; i < size; i++) {
			u32 reg = gv100_blcg_ctxsw_prog[i].addr;
			u32 val = prod ? gv100_blcg_ctxsw_prog[i].prod :
					 gv100_blcg_ctxsw_prog[i].disable;
			gk20a_writel(g, reg, val);
		}
	}
}

void gv100_blcg_fb_load_gating_prod(struct gk20a *g,
	bool prod)
{
	u32 i;
	u32 size = (u32)(sizeof(gv100_blcg_fb) / GATING_DESC_SIZE);

	if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) {
		for (i = 0; i < size; i++) {
			u32 reg = gv100_blcg_fb[i].addr;
			u32 val = prod ? gv100_blcg_fb[i].prod :
					gv100_blcg_fb[i].disable;
			gk20a_writel(g, reg, val);
		}
	}
}

void gv100_blcg_fifo_load_gating_prod(struct gk20a *g,
	bool prod)
{
	u32 i;
	u32 size = (u32)(sizeof(gv100_blcg_fifo) / GATING_DESC_SIZE);

	if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) {
	for (i = 0; i < size; i++) {
			u32 reg = gv100_blcg_fifo[i].addr;
			u32 val = prod ? gv100_blcg_fifo[i].prod :
					 gv100_blcg_fifo[i].disable;
			gk20a_writel(g, reg, val);
		}
	}
}

void gv100_blcg_gr_load_gating_prod(struct gk20a *g,
	bool prod)
{
	u32 i;
	u32 size = (u32)(sizeof(gv100_blcg_gr) / GATING_DESC_SIZE);

	if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) {
		for (i = 0; i < size; i++) {
			u32 reg = gv100_blcg_gr[i].addr;
			u32 val = prod ? gv100_blcg_gr[i].prod :
					 gv100_blcg_gr[i].disable;
			gk20a_writel(g, reg, val);
		}
	}
}

void gv100_blcg_ltc_load_gating_prod(struct gk20a *g,
	bool prod)
{
	u32 i;
	u32 size = (u32)(sizeof(gv100_blcg_ltc) / GATING_DESC_SIZE);

	if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) {
		for (i = 0; i < size; i++) {
			u32 reg = gv100_blcg_ltc[i].addr;
			u32 val = prod ? gv100_blcg_ltc[i].prod :
					 gv100_blcg_ltc[i].disable;
			gk20a_writel(g, reg, val);
		}
	}
}

void gv100_blcg_pwr_csb_load_gating_prod(struct gk20a *g,
	bool prod)
{
	u32 i;
	u32 size = (u32)(sizeof(gv100_blcg_pwr_csb) / GATING_DESC_SIZE);

	if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) {
		for (i = 0; i < size; i++) {
			u32 reg = gv100_blcg_pwr_csb[i].addr;
			u32 val = prod ? gv100_blcg_pwr_csb[i].prod :
					 gv100_blcg_pwr_csb[i].disable;
			gk20a_writel(g, reg, val);
		}
	}
}

void gv100_blcg_pmu_load_gating_prod(struct gk20a *g,
	bool prod)
{
	u32 i;
	u32 size = (u32)(sizeof(gv100_blcg_pmu) / GATING_DESC_SIZE);

	if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) {
		for (i = 0; i < size; i++) {
			u32 reg = gv100_blcg_pmu[i].addr;
			u32 val = prod ? gv100_blcg_pmu[i].prod :
					 gv100_blcg_pmu[i].disable;
			gk20a_writel(g, reg, val);
		}
	}
}

void gv100_blcg_xbar_load_gating_prod(struct gk20a *g,
	bool prod)
{
	u32 i;
	u32 size = (u32)(sizeof(gv100_blcg_xbar) / GATING_DESC_SIZE);

	if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) {
		for (i = 0; i < size; i++) {
			u32 reg = gv100_blcg_xbar[i].addr;
			u32 val = prod ? gv100_blcg_xbar[i].prod :
					 gv100_blcg_xbar[i].disable;
			gk20a_writel(g, reg, val);
		}
	}
}

void gr_gv100_pg_gr_load_gating_prod(struct gk20a *g,
	bool prod)
{
	u32 i;
	u32 size = (u32)(sizeof(gv100_pg_gr) / GATING_DESC_SIZE);

	if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) {
		for (i = 0; i < size; i++) {
			u32 reg = gv100_pg_gr[i].addr;
			u32 val = prod ? gv100_pg_gr[i].prod :
					 gv100_pg_gr[i].disable;
			gk20a_writel(g, reg, val);
		}
	}
}