From 0e0767672ae7e66d0ec249b8847f36c685fe995e Mon Sep 17 00:00:00 2001 From: Richard Zhao Date: Tue, 8 Aug 2017 15:45:33 -0700 Subject: gpu: nvgpu: vgpu: get engines info from RM server - get engines info from constants - remove according HAL from gp10b vgpu Jira VFND-3797 Change-Id: If010e59c358ab0519cb0d8d6211c0bcc20fc3723 Signed-off-by: Richard Zhao Reviewed-on: https://git-master.nvidia.com/r/1536179 Reviewed-by: svc-mobile-coverity GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom --- include/linux/tegra_vgpu.h | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'include') diff --git a/include/linux/tegra_vgpu.h b/include/linux/tegra_vgpu.h index 3f73d357..1c486f5c 100644 --- a/include/linux/tegra_vgpu.h +++ b/include/linux/tegra_vgpu.h @@ -422,6 +422,23 @@ struct tegra_vgpu_gpu_clk_rate_params { u32 rate; /* in kHz */ }; +/* TEGRA_VGPU_MAX_ENGINES must be equal or greater than num_engines */ +#define TEGRA_VGPU_MAX_ENGINES 4 +struct tegra_vgpu_engines_info { + u32 num_engines; + struct engineinfo { + u32 engine_id; + u32 intr_mask; + u32 reset_mask; + u32 runlist_id; + u32 pbdma_id; + u32 inst_id; + u32 pri_base; + u32 engine_enum; + u32 fault_id; + } info[TEGRA_VGPU_MAX_ENGINES]; +}; + #define TEGRA_VGPU_MAX_GPC_COUNT 16 #define TEGRA_VGPU_MAX_TPC_COUNT_PER_GPC 16 @@ -459,6 +476,7 @@ struct tegra_vgpu_constants_params { u32 default_timeslice_us; u32 preempt_ctx_size; u32 channel_base; + struct tegra_vgpu_engines_info engines_info; }; struct tegra_vgpu_channel_cyclestats_snapshot_params { -- cgit v1.2.2