From 837ceffcab417865db8adbdf1a2038ebde8ec1a5 Mon Sep 17 00:00:00 2001 From: Leonid Moiseichuk Date: Fri, 8 May 2015 15:06:42 +0300 Subject: gpu: nvgpu: cyclestats mode E snapshots support That is a kernel supporting code for cyclestats mode E. Cyclestats mode E implemented following Windows-design in user-space and required the following operations to be implemented: - attach a client for shared hardware buffer of device - detach client from shared hardware buffer - flush means copy of available data from hardware buffer to private client buffers according to perfmon IDs assigned for clients - perfmon IDs management for user-space clients - a NVGPU_GPU_FLAGS_SUPPORT_CYCLE_STATS_SNAPSHOT capability added Bug 1573150 Change-Id: I9e09f0fbb2be5a95c47e6d80a2e23fa839b46f9a Signed-off-by: Leonid Moiseichuk Reviewed-on: http://git-master/r/740653 (cherry picked from commit 79fe89fd4cea39d8ab9dbef0558cd806ddfda87f) Reviewed-on: http://git-master/r/753274 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom Tested-by: Terje Bergstrom --- include/uapi/linux/nvgpu.h | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) (limited to 'include/uapi') diff --git a/include/uapi/linux/nvgpu.h b/include/uapi/linux/nvgpu.h index e5bb0d07..1367b7be 100644 --- a/include/uapi/linux/nvgpu.h +++ b/include/uapi/linux/nvgpu.h @@ -106,6 +106,8 @@ struct nvgpu_gpu_zbc_query_table_args { #define NVGPU_GPU_FLAGS_SUPPORT_CYCLE_STATS (1 << 4) /* MAP_BUFFER_EX with unmapped PTE */ #define NVGPU_GPU_FLAGS_SUPPORT_UNMAPPED_PTE (1 << 5) +/* NVGPU_IOCTL_CHANNEL_CYCLE_STATS_SNAPSHOT is available */ +#define NVGPU_GPU_FLAGS_SUPPORT_CYCLE_STATS_SNAPSHOT (1 << 6) struct nvgpu_gpu_characteristics { __u32 arch; @@ -731,6 +733,21 @@ struct nvgpu_channel_events_ctrl_args { #define NVGPU_IOCTL_CHANNEL_EVENTS_CTRL_CMD_ENABLE 1 #define NVGPU_IOCTL_CHANNEL_EVENTS_CTRL_CMD_CLEAR 2 +/* cycle stats snapshot buffer support for mode E */ +struct nvgpu_cycle_stats_snapshot_args { + __u32 cmd; /* in: command to handle */ + __u32 dmabuf_fd; /* in: dma buffer handler */ + __u32 extra; /* in/out: extra payload e.g.*/ + /* counter/start perfmon */ + __u32 pad0[1]; +}; + +/* valid commands to control cycle stats shared buffer */ +#define NVGPU_IOCTL_CHANNEL_CYCLE_STATS_SNAPSHOT_CMD_FLUSH 0 +#define NVGPU_IOCTL_CHANNEL_CYCLE_STATS_SNAPSHOT_CMD_ATTACH 1 +#define NVGPU_IOCTL_CHANNEL_CYCLE_STATS_SNAPSHOT_CMD_DETACH 2 + + #define NVGPU_IOCTL_CHANNEL_SET_NVMAP_FD \ _IOW(NVGPU_IOCTL_MAGIC, 5, struct nvgpu_set_nvmap_fd_args) #define NVGPU_IOCTL_CHANNEL_SET_TIMEOUT \ @@ -769,9 +786,11 @@ struct nvgpu_channel_events_ctrl_args { _IO(NVGPU_IOCTL_MAGIC, 116) #define NVGPU_IOCTL_CHANNEL_EVENTS_CTRL \ _IOW(NVGPU_IOCTL_MAGIC, 117, struct nvgpu_channel_events_ctrl_args) +#define NVGPU_IOCTL_CHANNEL_CYCLE_STATS_SNAPSHOT \ + _IOWR(NVGPU_IOCTL_MAGIC, 118, struct nvgpu_cycle_stats_snapshot_args) #define NVGPU_IOCTL_CHANNEL_LAST \ - _IOC_NR(NVGPU_IOCTL_CHANNEL_EVENTS_CTRL) + _IOC_NR(NVGPU_IOCTL_CHANNEL_CYCLE_STATS_SNAPSHOT) #define NVGPU_IOCTL_CHANNEL_MAX_ARG_SIZE sizeof(struct nvgpu_submit_gpfifo_args) /* -- cgit v1.2.2