From 3f26f6955fc6736384e1d56f9ddff2baaa2102a0 Mon Sep 17 00:00:00 2001 From: Seshendra Gadagottu Date: Wed, 6 Apr 2016 18:01:17 -0700 Subject: include: uapi: nvgpu: add gv11b header Add gv11b header to export gv11b arch info. Bug 1735757 Change-Id: I66551eb6bd46652c2f1af3fe512060f5b7febef2 Signed-off-by: Seshendra Gadagottu Reviewed-on: http://git-master/r/1121508 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Ken Adams --- include/uapi/linux/nvgpu-t19x.h | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) create mode 100644 include/uapi/linux/nvgpu-t19x.h (limited to 'include/uapi/linux/nvgpu-t19x.h') diff --git a/include/uapi/linux/nvgpu-t19x.h b/include/uapi/linux/nvgpu-t19x.h new file mode 100644 index 00000000..6a10fb77 --- /dev/null +++ b/include/uapi/linux/nvgpu-t19x.h @@ -0,0 +1,30 @@ +/* + * NVGPU Public Interface Header + * + * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +/* This file is meant to extend nvgpu.h, not replace it + * as such, be sure that nvgpu.h is actually the file performing the + * inclusion, to the extent that's possible. + */ +#ifndef _UAPI__LINUX_NVGPU_IOCTL_H +# error "This file is to be included within nvgpu.h only." +#endif + +#ifndef _UAPI__LINUX_NVGPU_T19X_IOCTL_H_ +#define _UAPI__LINUX_NVGPU_T19X_IOCTL_H_ + +#define NVGPU_GPU_ARCH_GV110 0x00000150 +#define NVGPU_GPU_IMPL_GV11B 0x0000000B + +#endif /* _UAPI__LINUX_NVGPU_T19X_IOCTL_H_ */ -- cgit v1.2.2 From 6d758eb81bcbff4e50df5c9fa67a369a4e1f2074 Mon Sep 17 00:00:00 2001 From: seshendra Gadagottu Date: Thu, 29 Jun 2017 15:59:05 -0700 Subject: gpu: nvgpu: gv11b: support for full subcontext Changes to enable 64 subcontexts: 1 SYNC + 63 ASYNC Currently all subcontexts with in a tsg can have only single address space. Add support for NVGPU_TSG_IOCTL_BIND_CHANNEL_EX for selecting subctx id by client. Bug 1842197 Change-Id: Icf56a41303bd1ad7fc6f2a6fbc691bb7b4a01d22 Signed-off-by: seshendra Gadagottu Reviewed-on: https://git-master/r/1511145 Reviewed-by: Terje Bergstrom GVS: Gerrit_Virtual_Submit --- include/uapi/linux/nvgpu-t19x.h | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) (limited to 'include/uapi/linux/nvgpu-t19x.h') diff --git a/include/uapi/linux/nvgpu-t19x.h b/include/uapi/linux/nvgpu-t19x.h index 6a10fb77..96514a88 100644 --- a/include/uapi/linux/nvgpu-t19x.h +++ b/include/uapi/linux/nvgpu-t19x.h @@ -1,7 +1,7 @@ /* * NVGPU Public Interface Header * - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -27,4 +27,24 @@ #define NVGPU_GPU_ARCH_GV110 0x00000150 #define NVGPU_GPU_IMPL_GV11B 0x0000000B +/* subcontexts are available */ +#define NVGPU_GPU_FLAGS_SUPPORT_TSG_SUBCONTEXTS (1ULL << 22) + +struct nvgpu_tsg_bind_channel_ex_args { + /* in: channel fd */ + __s32 channel_fd; + + /* in: VEID in Volta */ + __u32 subcontext_id; + + __u64 reserved[2]; +}; + +#define NVGPU_TSG_IOCTL_BIND_CHANNEL_EX \ + _IOWR(NVGPU_TSG_IOCTL_MAGIC, 11, struct nvgpu_tsg_bind_channel_ex_args) + +#define NVGPU_TSG_IOCTL_MAX NVGPU_TSG_IOCTL_BIND_CHANNEL_EX + +#define NVGPU_TSG_IOCTL_MAX_ARG sizeof(struct nvgpu_tsg_bind_channel_ex_args) + #endif /* _UAPI__LINUX_NVGPU_T19X_IOCTL_H_ */ -- cgit v1.2.2 From afa31cdd8cc6bb04faeed30b2cc30f5e6be888b5 Mon Sep 17 00:00:00 2001 From: Deepak Nibade Date: Mon, 3 Jul 2017 16:40:44 +0530 Subject: gpu: nvgpu: add support for L3 cache allocation of buffers Add gv11b implementation of gpu_phys_addr() that checks the t19x GMMU attributes struct to determine if L3 allocation should be enabled. If L3 alloc is enabled then a special physical address bit is set. Add flag NVGPU_AS_MAP_BUFFER_FLAGS_L3_ALLOC to struct nvgpu_as_map_buffer_ex_args so that User space can add a hint to allocate buffer in L3 cache Jira GPUT19X-10 Bug 200279508 Change-Id: I1bb9876a670b252980922aa50e3e69b802be137f Signed-off-by: Deepak Nibade Reviewed-on: https://git-master/r/1512602 GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu --- include/uapi/linux/nvgpu-t19x.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include/uapi/linux/nvgpu-t19x.h') diff --git a/include/uapi/linux/nvgpu-t19x.h b/include/uapi/linux/nvgpu-t19x.h index 96514a88..bc37bc7c 100644 --- a/include/uapi/linux/nvgpu-t19x.h +++ b/include/uapi/linux/nvgpu-t19x.h @@ -27,6 +27,12 @@ #define NVGPU_GPU_ARCH_GV110 0x00000150 #define NVGPU_GPU_IMPL_GV11B 0x0000000B +/* + * this flag is used in struct nvgpu_as_map_buffer_ex_args + * to provide L3 cache allocation hint + */ +#define NVGPU_AS_MAP_BUFFER_FLAGS_L3_ALLOC (1 << 7) + /* subcontexts are available */ #define NVGPU_GPU_FLAGS_SUPPORT_TSG_SUBCONTEXTS (1ULL << 22) -- cgit v1.2.2 From de8e057f7eebcfe676278826ab457bf86b1b36fd Mon Sep 17 00:00:00 2001 From: David Nieto Date: Thu, 3 Aug 2017 21:43:50 -0700 Subject: gpu: nvgpu: GV100 support Adds support of GV100 up to devinit. JIRA: EVLR-1693 Change-Id: Ic7aa5f1c20714e05954139f143abb6a3459858fc Signed-off-by: David Nieto Reviewed-on: https://git-master.nvidia.com/r/1532747 Reviewed-by: svccoveritychecker GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom --- include/uapi/linux/nvgpu-t19x.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include/uapi/linux/nvgpu-t19x.h') diff --git a/include/uapi/linux/nvgpu-t19x.h b/include/uapi/linux/nvgpu-t19x.h index bc37bc7c..f56bc9d7 100644 --- a/include/uapi/linux/nvgpu-t19x.h +++ b/include/uapi/linux/nvgpu-t19x.h @@ -25,7 +25,9 @@ #define _UAPI__LINUX_NVGPU_T19X_IOCTL_H_ #define NVGPU_GPU_ARCH_GV110 0x00000150 +#define NVGPU_GPU_ARCH_GV100 0x00000140 #define NVGPU_GPU_IMPL_GV11B 0x0000000B +#define NVGPU_GPU_IMPL_GV100 0x00000000 /* * this flag is used in struct nvgpu_as_map_buffer_ex_args -- cgit v1.2.2 From 730ba218c1a57486f05e02cfaddf6a75e95ff498 Mon Sep 17 00:00:00 2001 From: Deepak Goyal Date: Fri, 27 Oct 2017 14:51:17 +0530 Subject: gpu: nvgpu: gv11b: Kernel iface for Dynamic TPC-PG This patch adds kernel interface for dynamic TPC-PG feature. User-space needs to send TPC-PG args to kernel via ioctl. Dynamic TPC-PG feature will allow every context to specify the number of TPC's it will use to run its workload. This way, graphics driver can power off non-required TPC's if a particular context has light to medium workload. JIRA GPUT19x-16 Change-Id: Id4846245a6414b719599d04784cbe2ca5282f4ad Signed-off-by: Deepak Goyal Reviewed-on: https://git-master.nvidia.com/r/1575848 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Alex Waterman GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu Reviewed-by: mobile promotions Tested-by: mobile promotions --- include/uapi/linux/nvgpu-t19x.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'include/uapi/linux/nvgpu-t19x.h') diff --git a/include/uapi/linux/nvgpu-t19x.h b/include/uapi/linux/nvgpu-t19x.h index f56bc9d7..27db97c0 100644 --- a/include/uapi/linux/nvgpu-t19x.h +++ b/include/uapi/linux/nvgpu-t19x.h @@ -44,8 +44,9 @@ struct nvgpu_tsg_bind_channel_ex_args { /* in: VEID in Volta */ __u32 subcontext_id; - - __u64 reserved[2]; + __u32 num_active_tpcs; + __u8 tpc_pg_enabled; + __u8 reserved[11]; }; #define NVGPU_TSG_IOCTL_BIND_CHANNEL_EX \ -- cgit v1.2.2