From 6eeabfbdd08e48f924885952c80ff41aa2b534b7 Mon Sep 17 00:00:00 2001 From: Peter Daifuku Date: Wed, 23 Mar 2016 09:43:43 -0700 Subject: gpu: nvgpu: vgpu: virtualized SMPC/HWPM ctx switch Add support for SMPC and HWPM context switching when virtualized Bug 1648200 JIRASW EVLR-219 JIRASW EVLR-253 Change-Id: I80a1613eaad87d8510f00d9aef001400d642ecdf Signed-off-by: Peter Daifuku Reviewed-on: http://git-master/r/1122034 Reviewed-by: Terje Bergstrom Tested-by: Terje Bergstrom --- include/linux/tegra_vgpu.h | 25 ++++++++++++++++++++++++- 1 file changed, 24 insertions(+), 1 deletion(-) (limited to 'include/linux/tegra_vgpu.h') diff --git a/include/linux/tegra_vgpu.h b/include/linux/tegra_vgpu.h index c4dd81dd..979d454e 100644 --- a/include/linux/tegra_vgpu.h +++ b/include/linux/tegra_vgpu.h @@ -76,7 +76,14 @@ enum { TEGRA_VGPU_CMD_REG_OPS, TEGRA_VGPU_CMD_CHANNEL_SET_PRIORITY, TEGRA_VGPU_CMD_CHANNEL_SET_RUNLIST_INTERLEAVE, - TEGRA_VGPU_CMD_CHANNEL_SET_TIMESLICE + TEGRA_VGPU_CMD_CHANNEL_SET_TIMESLICE, + RESVD1, + RESVD2, + RESVD3, + RESVD4, + TEGRA_VGPU_CMD_CHANNEL_SET_SMPC_CTXSW_MODE, + TEGRA_VGPU_CMD_CHANNEL_SET_HWPM_CTXSW_MODE, + TEGRA_VGPU_CMD_CHANNEL_FREE_HWPM_CTX, }; struct tegra_vgpu_connect_params { @@ -312,6 +319,20 @@ struct tegra_vgpu_channel_timeslice_params { u32 timeslice_us; }; +enum { + TEGRA_VGPU_CTXSW_MODE_NO_CTXSW = 0, + TEGRA_VGPU_CTXSW_MODE_CTXSW, +}; + +struct tegra_vgpu_channel_set_ctxsw_mode { + u64 handle; + u32 mode; +}; + +struct tegra_vgpu_channel_free_hwpm_ctx { + u64 handle; +}; + struct tegra_vgpu_cmd_msg { u32 cmd; int ret; @@ -342,6 +363,8 @@ struct tegra_vgpu_cmd_msg { struct tegra_vgpu_channel_priority_params channel_priority; struct tegra_vgpu_channel_runlist_interleave_params channel_interleave; struct tegra_vgpu_channel_timeslice_params channel_timeslice; + struct tegra_vgpu_channel_set_ctxsw_mode set_ctxsw_mode; + struct tegra_vgpu_channel_free_hwpm_ctx free_hwpm_ctx; char padding[192]; } params; }; -- cgit v1.2.2