From badee8f41a6304817b66287e39d81b382c575163 Mon Sep 17 00:00:00 2001 From: Adeel Raza Date: Thu, 2 Oct 2014 20:39:32 -0700 Subject: gpu: nvgpu: headers for linsim CL 33688874 Bug 1561645 Change-Id: Iccd909d54fc5b1d1c8fbc903b5908bf6f7f22ec8 Signed-off-by: Adeel Raza Reviewed-on: http://git-master/r/553151 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Alexander Van Brunt --- drivers/gpu/nvgpu/gp10b/hw_gr_gp10b.h | 54 ++++++++++++++++++-------------- drivers/gpu/nvgpu/gp10b/hw_ltc_gp10b.h | 24 ++++++++++++++ drivers/gpu/nvgpu/gp10b/hw_mc_gp10b.h | 32 +++---------------- drivers/gpu/nvgpu/gp10b/hw_pbdma_gp10b.h | 4 +-- drivers/gpu/nvgpu/gp10b/hw_trim_gp10b.h | 8 ++--- 5 files changed, 65 insertions(+), 57 deletions(-) (limited to 'drivers') diff --git a/drivers/gpu/nvgpu/gp10b/hw_gr_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_gr_gp10b.h index 7a4761d6..03164957 100644 --- a/drivers/gpu/nvgpu/gp10b/hw_gr_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/hw_gr_gp10b.h @@ -1126,18 +1126,6 @@ static inline u32 gr_pd_ab_dist_cfg2_state_limit_min_gpm_fifo_depths_v(void) { return 0x00000182; } -static inline u32 gr_pd_pagepool_r(void) -{ - return 0x004064cc; -} -static inline u32 gr_pd_pagepool_total_pages_f(u32 v) -{ - return (v & 0xff) << 0; -} -static inline u32 gr_pd_pagepool_valid_true_f(void) -{ - return 0x80000000; -} static inline u32 gr_pd_dist_skip_table_r(u32 i) { return 0x004064d0 + i*4; @@ -1302,6 +1290,18 @@ static inline u32 gr_ds_zbc_tbl_ld_trigger_active_f(void) { return 0x4; } +static inline u32 gr_ds_tga_constraintlogic_r(void) +{ + return 0xffffffff; +} +static inline u32 gr_ds_tga_constraintlogic_beta_cbsize_f(u32 v) +{ + return (v & 0x1) << -1; +} +static inline u32 gr_ds_tga_constraintlogic_alpha_cbsize_f(u32 v) +{ + return (v & 0x1) << -1; +} static inline u32 gr_ds_hww_esr_r(void) { return 0x00405840; @@ -1536,7 +1536,7 @@ static inline u32 gr_scc_pagepool_r(void) } static inline u32 gr_scc_pagepool_total_pages_f(u32 v) { - return (v & 0xff) << 0; + return (v & 0x3ff) << 0; } static inline u32 gr_scc_pagepool_total_pages_hwmax_v(void) { @@ -1544,7 +1544,7 @@ static inline u32 gr_scc_pagepool_total_pages_hwmax_v(void) } static inline u32 gr_scc_pagepool_total_pages_hwmax_value_v(void) { - return 0x00000080; + return 0x00000200; } static inline u32 gr_scc_pagepool_total_pages_byte_granularity_v(void) { @@ -1552,19 +1552,19 @@ static inline u32 gr_scc_pagepool_total_pages_byte_granularity_v(void) } static inline u32 gr_scc_pagepool_max_valid_pages_s(void) { - return 8; + return 10; } static inline u32 gr_scc_pagepool_max_valid_pages_f(u32 v) { - return (v & 0xff) << 8; + return (v & 0x3ff) << 10; } static inline u32 gr_scc_pagepool_max_valid_pages_m(void) { - return 0xff << 8; + return 0x3ff << 10; } static inline u32 gr_scc_pagepool_max_valid_pages_v(u32 r) { - return (r >> 8) & 0xff; + return (r >> 10) & 0x3ff; } static inline u32 gr_scc_pagepool_valid_true_f(void) { @@ -1788,7 +1788,7 @@ static inline u32 gr_gpc0_ppc0_cbm_beta_cb_size_v_m(void) } static inline u32 gr_gpc0_ppc0_cbm_beta_cb_size_v_default_v(void) { - return 0x00100000; + return 0x00030000; } static inline u32 gr_gpc0_ppc0_cbm_beta_cb_size_v_granularity_v(void) { @@ -2068,11 +2068,19 @@ static inline u32 gr_gpcs_swdx_tc_beta_cb_size_r(u32 i) } static inline u32 gr_gpcs_swdx_tc_beta_cb_size_v_f(u32 v) { - return (v & 0x3fffff) << 0; + return (v & 0xffffffff) << -1; } static inline u32 gr_gpcs_swdx_tc_beta_cb_size_v_m(void) { - return 0x3fffff << 0; + return 0xffffffff << -1; +} +static inline u32 gr_gpcs_swdx_tc_beta_cb_size_div3_f(u32 v) +{ + return (v & 0xffffffff) << -1; +} +static inline u32 gr_gpcs_swdx_tc_beta_cb_size_div3_m(void) +{ + return 0xffffffff << -1; } static inline u32 gr_gpcs_swdx_rm_pagepool_r(void) { @@ -2080,7 +2088,7 @@ static inline u32 gr_gpcs_swdx_rm_pagepool_r(void) } static inline u32 gr_gpcs_swdx_rm_pagepool_total_pages_f(u32 v) { - return (v & 0xff) << 0; + return (v & 0x3ff) << 0; } static inline u32 gr_gpcs_swdx_rm_pagepool_valid_true_f(void) { @@ -2464,7 +2472,7 @@ static inline u32 gr_gpcs_gcc_pagepool_r(void) } static inline u32 gr_gpcs_gcc_pagepool_total_pages_f(u32 v) { - return (v & 0xff) << 0; + return (v & 0x3ff) << 0; } static inline u32 gr_gpcs_tpcs_pe_vaf_r(void) { diff --git a/drivers/gpu/nvgpu/gp10b/hw_ltc_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_ltc_gp10b.h index 1ead0679..32c4a01d 100644 --- a/drivers/gpu/nvgpu/gp10b/hw_ltc_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/hw_ltc_gp10b.h @@ -50,6 +50,30 @@ #ifndef _hw_ltc_gp10b_h_ #define _hw_ltc_gp10b_h_ +static inline u32 ltc_ltc0_ltss_tstg_cmgmt0_r(void) +{ + return 0xffffffff; +} +static inline u32 ltc_ltc0_ltss_tstg_cmgmt1_r(void) +{ + return 0xffffffff; +} +static inline u32 ltc_ltc1_ltss_tstg_cmgmt0_r(void) +{ + return 0xffffffff; +} +static inline u32 ltc_ltc1_ltss_tstg_cmgmt1_r(void) +{ + return 0xffffffff; +} +static inline u32 ltc_ltcs_ltss_tstg_cmgmt0_r(void) +{ + return 0xffffffff; +} +static inline u32 ltc_ltcs_ltss_tstg_cmgmt1_r(void) +{ + return 0xffffffff; +} static inline u32 ltc_ltcs_lts0_cbc_ctrl1_r(void) { return 0x0014046c; diff --git a/drivers/gpu/nvgpu/gp10b/hw_mc_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_mc_gp10b.h index f45fdc99..83e06e8e 100644 --- a/drivers/gpu/nvgpu/gp10b/hw_mc_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/hw_mc_gp10b.h @@ -50,9 +50,9 @@ #ifndef _hw_mc_gp10b_h_ #define _hw_mc_gp10b_h_ -static inline u32 mc_intr_0_r(void) +static inline u32 mc_intr_0_r(u32 i) { - return 0x00000100; + return 0x00000100 + i*4; } static inline u32 mc_intr_0_pfifo_pending_f(void) { @@ -78,33 +78,9 @@ static inline u32 mc_intr_0_pbus_pending_f(void) { return 0x10000000; } -static inline u32 mc_intr_mask_0_r(void) +static inline u32 mc_intr_en_0_r(u32 i) { - return 0x00000640; -} -static inline u32 mc_intr_mask_0_pmu_enabled_f(void) -{ - return 0x1000000; -} -static inline u32 mc_intr_en_0_r(void) -{ - return 0x00000140; -} -static inline u32 mc_intr_en_0_inta_disabled_f(void) -{ - return 0x0; -} -static inline u32 mc_intr_en_0_inta_hardware_f(void) -{ - return 0x1; -} -static inline u32 mc_intr_en_1_r(void) -{ - return 0x00000144; -} -static inline u32 mc_intr_en_1_inta_disabled_f(void) -{ - return 0x0; + return 0x00000140 + i*4; } static inline u32 mc_enable_r(void) { diff --git a/drivers/gpu/nvgpu/gp10b/hw_pbdma_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_pbdma_gp10b.h index d3fa8553..5720cde1 100644 --- a/drivers/gpu/nvgpu/gp10b/hw_pbdma_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/hw_pbdma_gp10b.h @@ -448,7 +448,7 @@ static inline u32 pbdma_syncpointb_r(u32 i) } static inline u32 pbdma_syncpointb_op_v(u32 r) { - return (r >> 0) & 0x3; + return (r >> 0) & 0x1; } static inline u32 pbdma_syncpointb_op_wait_v(void) { @@ -464,6 +464,6 @@ static inline u32 pbdma_syncpointb_wait_switch_en_v(void) } static inline u32 pbdma_syncpointb_syncpt_index_v(u32 r) { - return (r >> 8) & 0xff; + return (r >> 8) & 0xfff; } #endif diff --git a/drivers/gpu/nvgpu/gp10b/hw_trim_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_trim_gp10b.h index 76597f69..94da91b0 100644 --- a/drivers/gpu/nvgpu/gp10b/hw_trim_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/hw_trim_gp10b.h @@ -200,11 +200,11 @@ static inline u32 trim_sys_gpc2clk_out_sdiv14_indiv4_mode_f(void) } static inline u32 trim_gpc_clk_cntr_ncgpcclk_cfg_r(u32 i) { - return 0x00134124 + i*512; + return 0x001e0124 + i*1024; } static inline u32 trim_gpc_clk_cntr_ncgpcclk_cfg_noofipclks_f(u32 v) { - return (v & 0x3fff) << 0; + return (v & 0xffff) << 0; } static inline u32 trim_gpc_clk_cntr_ncgpcclk_cfg_write_en_asserted_f(void) { @@ -220,11 +220,11 @@ static inline u32 trim_gpc_clk_cntr_ncgpcclk_cfg_reset_asserted_f(void) } static inline u32 trim_gpc_clk_cntr_ncgpcclk_cnt_r(u32 i) { - return 0x00134128 + i*512; + return 0x001e0128 + i*1024; } static inline u32 trim_gpc_clk_cntr_ncgpcclk_cnt_value_v(u32 r) { - return (r >> 0) & 0xfffff; + return (r >> 0) & 0xfffffff; } static inline u32 trim_sys_gpcpll_cfg2_r(void) { -- cgit v1.2.2