From b9194a1c3300e505d22fba97136dd305300397f0 Mon Sep 17 00:00:00 2001 From: Alex Waterman Date: Thu, 12 Jan 2017 18:18:49 -0800 Subject: gpu: nvgpu: Organize nvgpu_common.[ch] Move nvgpu_common.c to drivers/gpu/nvgpu/common since it is a common C file to all drivers. Similarly move nvgpu_common.h to drivers/gpu/nvgpu/include/nvgpu since this follows the new include guidelines. Bug 1799159 Change-Id: I00ebed289973b27704c2cff073526e36505bf699 Signed-off-by: Alex Waterman Reviewed-on: http://git-master/r/1284612 Reviewed-by: Varun Colbert Tested-by: Varun Colbert --- drivers/gpu/nvgpu/Makefile.nvgpu | 2 +- drivers/gpu/nvgpu/common/nvgpu_common.c | 277 +++++++++++++++++++++++++ drivers/gpu/nvgpu/gk20a/cde_gk20a.c | 2 +- drivers/gpu/nvgpu/gk20a/gk20a.c | 2 +- drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c | 5 +- drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 2 +- drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | 2 +- drivers/gpu/nvgpu/gm206/acr_gm206.c | 5 +- drivers/gpu/nvgpu/gm206/bios_gm206.c | 5 +- drivers/gpu/nvgpu/gm20b/acr_gm20b.c | 3 +- drivers/gpu/nvgpu/gp106/acr_gp106.c | 3 +- drivers/gpu/nvgpu/include/nvgpu/nvgpu_common.h | 35 ++++ drivers/gpu/nvgpu/nvgpu_common.c | 277 ------------------------- drivers/gpu/nvgpu/nvgpu_common.h | 35 ---- drivers/gpu/nvgpu/pci.c | 7 +- 15 files changed, 334 insertions(+), 328 deletions(-) create mode 100644 drivers/gpu/nvgpu/common/nvgpu_common.c create mode 100644 drivers/gpu/nvgpu/include/nvgpu/nvgpu_common.h delete mode 100644 drivers/gpu/nvgpu/nvgpu_common.c delete mode 100644 drivers/gpu/nvgpu/nvgpu_common.h (limited to 'drivers') diff --git a/drivers/gpu/nvgpu/Makefile.nvgpu b/drivers/gpu/nvgpu/Makefile.nvgpu index 9a061493..0f8f5bc1 100644 --- a/drivers/gpu/nvgpu/Makefile.nvgpu +++ b/drivers/gpu/nvgpu/Makefile.nvgpu @@ -31,7 +31,7 @@ nvgpu-y := \ common/mm/buddy_allocator.o \ common/mm/page_allocator.o \ common/mm/lockless_allocator.o \ - nvgpu_common.o \ + common/nvgpu_common.o \ gk20a/gk20a.o \ gk20a/sched_gk20a.o \ gk20a/as_gk20a.o \ diff --git a/drivers/gpu/nvgpu/common/nvgpu_common.c b/drivers/gpu/nvgpu/common/nvgpu_common.c new file mode 100644 index 00000000..80f1cca0 --- /dev/null +++ b/drivers/gpu/nvgpu/common/nvgpu_common.c @@ -0,0 +1,277 @@ +/* + * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include +#include + +#include "gk20a/gk20a_scale.h" +#include "gk20a/gk20a.h" + +#include + +#define EMC3D_DEFAULT_RATIO 750 + +static void nvgpu_init_vars(struct gk20a *g) +{ + struct gk20a_platform *platform = dev_get_drvdata(g->dev); + + init_waitqueue_head(&g->sw_irq_stall_last_handled_wq); + init_waitqueue_head(&g->sw_irq_nonstall_last_handled_wq); + gk20a_init_gr(g); + + init_rwsem(&g->busy_lock); + + spin_lock_init(&g->mc_enable_lock); + + mutex_init(&platform->railgate_lock); + mutex_init(&g->dbg_sessions_lock); + mutex_init(&g->client_lock); + mutex_init(&g->ch_wdt_lock); + mutex_init(&g->poweroff_lock); + + g->regs_saved = g->regs; + g->bar1_saved = g->bar1; + + g->emc3d_ratio = EMC3D_DEFAULT_RATIO; + + /* Set DMA parameters to allow larger sgt lists */ + g->dev->dma_parms = &g->dma_parms; + dma_set_max_seg_size(g->dev, UINT_MAX); + + INIT_LIST_HEAD(&g->pending_sema_waits); + raw_spin_lock_init(&g->pending_sema_waits_lock); +} + +static void nvgpu_init_timeout(struct gk20a *g) +{ + g->gr_idle_timeout_default = CONFIG_GK20A_DEFAULT_TIMEOUT; + if (tegra_platform_is_silicon()) + g->timeouts_enabled = true; +} + +static void nvgpu_init_timeslice(struct gk20a *g) +{ + g->runlist_interleave = true; + + g->timeslice_low_priority_us = 1300; + g->timeslice_medium_priority_us = 2600; + g->timeslice_high_priority_us = 5200; + + g->min_timeslice_us = 1000; + g->max_timeslice_us = 50000; +} + +static void nvgpu_init_pm_vars(struct gk20a *g) +{ + struct gk20a_platform *platform = dev_get_drvdata(g->dev); + + /* + * Set up initial power settings. For non-slicon platforms, disable + * power features and for silicon platforms, read from platform data + */ + g->slcg_enabled = + tegra_platform_is_silicon() ? platform->enable_slcg : false; + g->blcg_enabled = + tegra_platform_is_silicon() ? platform->enable_blcg : false; + g->elcg_enabled = + tegra_platform_is_silicon() ? platform->enable_elcg : false; + g->elpg_enabled = + tegra_platform_is_silicon() ? platform->enable_elpg : false; + g->aelpg_enabled = + tegra_platform_is_silicon() ? platform->enable_aelpg : false; + g->mscg_enabled = + tegra_platform_is_silicon() ? platform->enable_mscg : false; + + /* set default values to aelpg parameters */ + g->pmu.aelpg_param[0] = APCTRL_SAMPLING_PERIOD_PG_DEFAULT_US; + g->pmu.aelpg_param[1] = APCTRL_MINIMUM_IDLE_FILTER_DEFAULT_US; + g->pmu.aelpg_param[2] = APCTRL_MINIMUM_TARGET_SAVING_DEFAULT_US; + g->pmu.aelpg_param[3] = APCTRL_POWER_BREAKEVEN_DEFAULT_US; + g->pmu.aelpg_param[4] = APCTRL_CYCLES_PER_SAMPLE_MAX_DEFAULT; +} + +static void nvgpu_init_mm_vars(struct gk20a *g) +{ + struct gk20a_platform *platform = dev_get_drvdata(g->dev); + + g->mm.bypass_smmu = platform->bypass_smmu; + g->mm.disable_bigpage = platform->disable_bigpage; + g->mm.vidmem_is_vidmem = platform->vidmem_is_vidmem; +} + +int nvgpu_probe(struct gk20a *g, + const char *debugfs_symlink, + const char *interface_name, + struct class *class) +{ + struct gk20a_platform *platform = dev_get_drvdata(g->dev); + int err = 0; + + nvgpu_init_vars(g); + nvgpu_init_timeout(g); + nvgpu_init_timeslice(g); + nvgpu_init_pm_vars(g); + + /* Initialize the platform interface. */ + err = platform->probe(g->dev); + if (err) { + dev_err(g->dev, "platform probe failed"); + return err; + } + + /* platform probe can defer do user init only if probe succeeds */ + err = gk20a_user_init(g->dev, interface_name, class); + if (err) + return err; + + + /* Initialise scaling */ + if (IS_ENABLED(CONFIG_GK20A_DEVFREQ)) + gk20a_scale_init(g->dev); + + err = gk20a_secure_page_alloc(g->dev); + if (err) + dev_err(g->dev, + "failed to allocate secure buffer %d\n", err); + + if (platform->late_probe) { + err = platform->late_probe(g->dev); + if (err) { + dev_err(g->dev, "late probe failed"); + return err; + } + } + + nvgpu_init_mm_vars(g); + + gk20a_create_sysfs(g->dev); + gk20a_debug_init(g->dev, debugfs_symlink); + + g->dbg_regops_tmp_buf = kzalloc(SZ_4K, GFP_KERNEL); + if (!g->dbg_regops_tmp_buf) { + dev_err(g->dev, "couldn't allocate regops tmp buf"); + return -ENOMEM; + } + g->dbg_regops_tmp_buf_ops = + SZ_4K / sizeof(g->dbg_regops_tmp_buf[0]); + + g->remove_support = gk20a_remove_support; + + return 0; +} + +static const struct firmware *do_request_firmware(struct device *dev, + const char *prefix, const char *fw_name, int flags) +{ + const struct firmware *fw; + char *fw_path = NULL; + int path_len, err; + + if (prefix) { + path_len = strlen(prefix) + strlen(fw_name); + path_len += 2; /* for the path separator and zero terminator*/ + + fw_path = kzalloc(sizeof(*fw_path) * path_len, GFP_KERNEL); + if (!fw_path) + return NULL; + + sprintf(fw_path, "%s/%s", prefix, fw_name); + fw_name = fw_path; + } + +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,18,0) + err = request_firmware(&fw, fw_name, dev); +#else + if (flags & NVGPU_REQUEST_FIRMWARE_NO_WARN) + err = request_firmware_direct(&fw, fw_name, dev); + else + err = request_firmware(&fw, fw_name, dev); +#endif + + kfree(fw_path); + if (err) + return NULL; + return fw; +} + +/* This is a simple wrapper around request_firmware that takes 'fw_name' and + * applies an IP specific relative path prefix to it. The caller is + * responsible for calling release_firmware later. */ +const struct firmware *nvgpu_request_firmware(struct gk20a *g, + const char *fw_name, + int flags) +{ + struct device *dev = g->dev; + const struct firmware *fw; + + /* current->fs is NULL when calling from SYS_EXIT. + Add a check here to prevent crash in request_firmware */ + if (!current->fs || !fw_name) + return NULL; + + BUG_ON(!g->ops.name); + fw = do_request_firmware(dev, g->ops.name, fw_name, flags); + +#ifdef CONFIG_TEGRA_GK20A + /* TO BE REMOVED - Support loading from legacy SOC specific path. */ + if (!fw && !(flags & NVGPU_REQUEST_FIRMWARE_NO_SOC)) { + struct gk20a_platform *platform = gk20a_get_platform(dev); + fw = do_request_firmware(dev, + platform->soc_name, fw_name, flags); + } +#endif + + return fw; +} + +/** + * cyclic_delta - Returns delta of cyclic integers a and b. + * + * @a - First integer + * @b - Second integer + * + * Note: if a is ahead of b, delta is positive. + */ +static int cyclic_delta(int a, int b) +{ + return a - b; +} + +/** + * nvgpu_wait_for_deferred_interrupts - Wait for interrupts to complete + * + * @g - The GPU to wait on. + * + * Waits until all interrupt handlers that have been scheduled to run have + * completed. + */ +void nvgpu_wait_for_deferred_interrupts(struct gk20a *g) +{ + int stall_irq_threshold = atomic_read(&g->hw_irq_stall_count); + int nonstall_irq_threshold = atomic_read(&g->hw_irq_nonstall_count); + + /* wait until all stalling irqs are handled */ + wait_event(g->sw_irq_stall_last_handled_wq, + cyclic_delta(stall_irq_threshold, + atomic_read(&g->sw_irq_stall_last_handled)) + <= 0); + + /* wait until all non-stalling irqs are handled */ + wait_event(g->sw_irq_nonstall_last_handled_wq, + cyclic_delta(nonstall_irq_threshold, + atomic_read(&g->sw_irq_nonstall_last_handled)) + <= 0); +} diff --git a/drivers/gpu/nvgpu/gk20a/cde_gk20a.c b/drivers/gpu/nvgpu/gk20a/cde_gk20a.c index 384fbdef..b4a1f6f4 100644 --- a/drivers/gpu/nvgpu/gk20a/cde_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/cde_gk20a.c @@ -25,6 +25,7 @@ #include #include +#include #include "gk20a.h" #include "channel_gk20a.h" @@ -34,7 +35,6 @@ #include "gr_gk20a.h" #include "debug_gk20a.h" #include "semaphore_gk20a.h" -#include "nvgpu_common.h" #include #include diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c index f3ccd613..ee6586ae 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gk20a.c @@ -42,11 +42,11 @@ #include #include +#include #include #include #include "gk20a.h" -#include "nvgpu_common.h" #include "debug_gk20a.h" #include "ctrl_gk20a.h" #include "channel_sync_gk20a.h" diff --git a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c index e651ad2e..7342cb1d 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c @@ -3,7 +3,7 @@ * * GK20A Graphics Context * - * Copyright (c) 2011-2016, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2011-2017, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -21,9 +21,10 @@ #include +#include + #include "gk20a.h" #include "gr_ctx_gk20a.h" -#include "nvgpu_common.h" #include diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 5802cb68..cddb3316 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c @@ -32,6 +32,7 @@ #include #include +#include #include "gk20a.h" #include "kind_gk20a.h" @@ -43,7 +44,6 @@ #include "semaphore_gk20a.h" #include "platform_gk20a.h" #include "ctxsw_trace_gk20a.h" -#include "nvgpu_common.h" #include #include diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c index 0a2d36fe..9924e48f 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c @@ -24,12 +24,12 @@ #include #include +#include #include #include "gk20a.h" #include "gr_gk20a.h" #include "semaphore_gk20a.h" -#include "nvgpu_common.h" #include #include diff --git a/drivers/gpu/nvgpu/gm206/acr_gm206.c b/drivers/gpu/nvgpu/gm206/acr_gm206.c index 523f0c33..238114e3 100644 --- a/drivers/gpu/nvgpu/gm206/acr_gm206.c +++ b/drivers/gpu/nvgpu/gm206/acr_gm206.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2016, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -25,7 +25,8 @@ #include "acr.h" #include "acr_gm206.h" -#include "nvgpu_common.h" + +#include #include diff --git a/drivers/gpu/nvgpu/gm206/bios_gm206.c b/drivers/gpu/nvgpu/gm206/bios_gm206.c index fa736da5..a5551f42 100644 --- a/drivers/gpu/nvgpu/gm206/bios_gm206.c +++ b/drivers/gpu/nvgpu/gm206/bios_gm206.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2016, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -20,7 +20,8 @@ #include "gm20b/fifo_gm20b.h" #include "fifo_gm206.h" #include "bios_gm206.h" -#include "nvgpu_common.h" + +#include #include #include diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c index e47bc773..060dc778 100644 --- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c @@ -22,8 +22,7 @@ #include #include - -#include "nvgpu_common.h" +#include #include "gk20a/gk20a.h" #include "gk20a/pmu_gk20a.h" diff --git a/drivers/gpu/nvgpu/gp106/acr_gp106.c b/drivers/gpu/nvgpu/gp106/acr_gp106.c index 308f1caf..9e844994 100644 --- a/drivers/gpu/nvgpu/gp106/acr_gp106.c +++ b/drivers/gpu/nvgpu/gp106/acr_gp106.c @@ -29,7 +29,8 @@ #include "sec2_gp106.h" #include "nvgpu_gpuid_t18x.h" -#include "nvgpu_common.h" + +#include #include #include diff --git a/drivers/gpu/nvgpu/include/nvgpu/nvgpu_common.h b/drivers/gpu/nvgpu/include/nvgpu/nvgpu_common.h new file mode 100644 index 00000000..85b4a3df --- /dev/null +++ b/drivers/gpu/nvgpu/include/nvgpu/nvgpu_common.h @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef NVGPU_COMMON_H +#define NVGPU_COMMON_H + +struct gk20a; +struct class; + +int nvgpu_probe(struct gk20a *g, + const char *debugfs_symlink, + const char *interface_name, + struct class *class); + +#define NVGPU_REQUEST_FIRMWARE_NO_WARN BIT(0) +#define NVGPU_REQUEST_FIRMWARE_NO_SOC BIT(1) + +const struct firmware *nvgpu_request_firmware(struct gk20a *g, + const char *fw_name, + int flags); + +#endif diff --git a/drivers/gpu/nvgpu/nvgpu_common.c b/drivers/gpu/nvgpu/nvgpu_common.c deleted file mode 100644 index 3e57c83d..00000000 --- a/drivers/gpu/nvgpu/nvgpu_common.c +++ /dev/null @@ -1,277 +0,0 @@ -/* - * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include -#include - -#include "nvgpu_common.h" -#include "gk20a/gk20a_scale.h" -#include "gk20a/gk20a.h" -#include "nvgpu_common.h" - -#define EMC3D_DEFAULT_RATIO 750 - -static void nvgpu_init_vars(struct gk20a *g) -{ - struct gk20a_platform *platform = dev_get_drvdata(g->dev); - - init_waitqueue_head(&g->sw_irq_stall_last_handled_wq); - init_waitqueue_head(&g->sw_irq_nonstall_last_handled_wq); - gk20a_init_gr(g); - - init_rwsem(&g->busy_lock); - - spin_lock_init(&g->mc_enable_lock); - - mutex_init(&platform->railgate_lock); - mutex_init(&g->dbg_sessions_lock); - mutex_init(&g->client_lock); - mutex_init(&g->ch_wdt_lock); - mutex_init(&g->poweroff_lock); - - g->regs_saved = g->regs; - g->bar1_saved = g->bar1; - - g->emc3d_ratio = EMC3D_DEFAULT_RATIO; - - /* Set DMA parameters to allow larger sgt lists */ - g->dev->dma_parms = &g->dma_parms; - dma_set_max_seg_size(g->dev, UINT_MAX); - - INIT_LIST_HEAD(&g->pending_sema_waits); - raw_spin_lock_init(&g->pending_sema_waits_lock); -} - -static void nvgpu_init_timeout(struct gk20a *g) -{ - g->gr_idle_timeout_default = CONFIG_GK20A_DEFAULT_TIMEOUT; - if (tegra_platform_is_silicon()) - g->timeouts_enabled = true; -} - -static void nvgpu_init_timeslice(struct gk20a *g) -{ - g->runlist_interleave = true; - - g->timeslice_low_priority_us = 1300; - g->timeslice_medium_priority_us = 2600; - g->timeslice_high_priority_us = 5200; - - g->min_timeslice_us = 1000; - g->max_timeslice_us = 50000; -} - -static void nvgpu_init_pm_vars(struct gk20a *g) -{ - struct gk20a_platform *platform = dev_get_drvdata(g->dev); - - /* - * Set up initial power settings. For non-slicon platforms, disable - * power features and for silicon platforms, read from platform data - */ - g->slcg_enabled = - tegra_platform_is_silicon() ? platform->enable_slcg : false; - g->blcg_enabled = - tegra_platform_is_silicon() ? platform->enable_blcg : false; - g->elcg_enabled = - tegra_platform_is_silicon() ? platform->enable_elcg : false; - g->elpg_enabled = - tegra_platform_is_silicon() ? platform->enable_elpg : false; - g->aelpg_enabled = - tegra_platform_is_silicon() ? platform->enable_aelpg : false; - g->mscg_enabled = - tegra_platform_is_silicon() ? platform->enable_mscg : false; - - /* set default values to aelpg parameters */ - g->pmu.aelpg_param[0] = APCTRL_SAMPLING_PERIOD_PG_DEFAULT_US; - g->pmu.aelpg_param[1] = APCTRL_MINIMUM_IDLE_FILTER_DEFAULT_US; - g->pmu.aelpg_param[2] = APCTRL_MINIMUM_TARGET_SAVING_DEFAULT_US; - g->pmu.aelpg_param[3] = APCTRL_POWER_BREAKEVEN_DEFAULT_US; - g->pmu.aelpg_param[4] = APCTRL_CYCLES_PER_SAMPLE_MAX_DEFAULT; -} - -static void nvgpu_init_mm_vars(struct gk20a *g) -{ - struct gk20a_platform *platform = dev_get_drvdata(g->dev); - - g->mm.bypass_smmu = platform->bypass_smmu; - g->mm.disable_bigpage = platform->disable_bigpage; - g->mm.vidmem_is_vidmem = platform->vidmem_is_vidmem; -} - -int nvgpu_probe(struct gk20a *g, - const char *debugfs_symlink, - const char *interface_name, - struct class *class) -{ - struct gk20a_platform *platform = dev_get_drvdata(g->dev); - int err = 0; - - nvgpu_init_vars(g); - nvgpu_init_timeout(g); - nvgpu_init_timeslice(g); - nvgpu_init_pm_vars(g); - - /* Initialize the platform interface. */ - err = platform->probe(g->dev); - if (err) { - dev_err(g->dev, "platform probe failed"); - return err; - } - - /* platform probe can defer do user init only if probe succeeds */ - err = gk20a_user_init(g->dev, interface_name, class); - if (err) - return err; - - - /* Initialise scaling */ - if (IS_ENABLED(CONFIG_GK20A_DEVFREQ)) - gk20a_scale_init(g->dev); - - err = gk20a_secure_page_alloc(g->dev); - if (err) - dev_err(g->dev, - "failed to allocate secure buffer %d\n", err); - - if (platform->late_probe) { - err = platform->late_probe(g->dev); - if (err) { - dev_err(g->dev, "late probe failed"); - return err; - } - } - - nvgpu_init_mm_vars(g); - - gk20a_create_sysfs(g->dev); - gk20a_debug_init(g->dev, debugfs_symlink); - - g->dbg_regops_tmp_buf = kzalloc(SZ_4K, GFP_KERNEL); - if (!g->dbg_regops_tmp_buf) { - dev_err(g->dev, "couldn't allocate regops tmp buf"); - return -ENOMEM; - } - g->dbg_regops_tmp_buf_ops = - SZ_4K / sizeof(g->dbg_regops_tmp_buf[0]); - - g->remove_support = gk20a_remove_support; - - return 0; -} - -static const struct firmware *do_request_firmware(struct device *dev, - const char *prefix, const char *fw_name, int flags) -{ - const struct firmware *fw; - char *fw_path = NULL; - int path_len, err; - - if (prefix) { - path_len = strlen(prefix) + strlen(fw_name); - path_len += 2; /* for the path separator and zero terminator*/ - - fw_path = kzalloc(sizeof(*fw_path) * path_len, GFP_KERNEL); - if (!fw_path) - return NULL; - - sprintf(fw_path, "%s/%s", prefix, fw_name); - fw_name = fw_path; - } - -#if LINUX_VERSION_CODE < KERNEL_VERSION(3,18,0) - err = request_firmware(&fw, fw_name, dev); -#else - if (flags & NVGPU_REQUEST_FIRMWARE_NO_WARN) - err = request_firmware_direct(&fw, fw_name, dev); - else - err = request_firmware(&fw, fw_name, dev); -#endif - - kfree(fw_path); - if (err) - return NULL; - return fw; -} - -/* This is a simple wrapper around request_firmware that takes 'fw_name' and - * applies an IP specific relative path prefix to it. The caller is - * responsible for calling release_firmware later. */ -const struct firmware *nvgpu_request_firmware(struct gk20a *g, - const char *fw_name, - int flags) -{ - struct device *dev = g->dev; - const struct firmware *fw; - - /* current->fs is NULL when calling from SYS_EXIT. - Add a check here to prevent crash in request_firmware */ - if (!current->fs || !fw_name) - return NULL; - - BUG_ON(!g->ops.name); - fw = do_request_firmware(dev, g->ops.name, fw_name, flags); - -#ifdef CONFIG_TEGRA_GK20A - /* TO BE REMOVED - Support loading from legacy SOC specific path. */ - if (!fw && !(flags & NVGPU_REQUEST_FIRMWARE_NO_SOC)) { - struct gk20a_platform *platform = gk20a_get_platform(dev); - fw = do_request_firmware(dev, - platform->soc_name, fw_name, flags); - } -#endif - - return fw; -} - -/** - * cyclic_delta - Returns delta of cyclic integers a and b. - * - * @a - First integer - * @b - Second integer - * - * Note: if a is ahead of b, delta is positive. - */ -static int cyclic_delta(int a, int b) -{ - return a - b; -} - -/** - * nvgpu_wait_for_deferred_interrupts - Wait for interrupts to complete - * - * @g - The GPU to wait on. - * - * Waits until all interrupt handlers that have been scheduled to run have - * completed. - */ -void nvgpu_wait_for_deferred_interrupts(struct gk20a *g) -{ - int stall_irq_threshold = atomic_read(&g->hw_irq_stall_count); - int nonstall_irq_threshold = atomic_read(&g->hw_irq_nonstall_count); - - /* wait until all stalling irqs are handled */ - wait_event(g->sw_irq_stall_last_handled_wq, - cyclic_delta(stall_irq_threshold, - atomic_read(&g->sw_irq_stall_last_handled)) - <= 0); - - /* wait until all non-stalling irqs are handled */ - wait_event(g->sw_irq_nonstall_last_handled_wq, - cyclic_delta(nonstall_irq_threshold, - atomic_read(&g->sw_irq_nonstall_last_handled)) - <= 0); -} diff --git a/drivers/gpu/nvgpu/nvgpu_common.h b/drivers/gpu/nvgpu/nvgpu_common.h deleted file mode 100644 index 85b4a3df..00000000 --- a/drivers/gpu/nvgpu/nvgpu_common.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef NVGPU_COMMON_H -#define NVGPU_COMMON_H - -struct gk20a; -struct class; - -int nvgpu_probe(struct gk20a *g, - const char *debugfs_symlink, - const char *interface_name, - struct class *class); - -#define NVGPU_REQUEST_FIRMWARE_NO_WARN BIT(0) -#define NVGPU_REQUEST_FIRMWARE_NO_SOC BIT(1) - -const struct firmware *nvgpu_request_firmware(struct gk20a *g, - const char *fw_name, - int flags); - -#endif diff --git a/drivers/gpu/nvgpu/pci.c b/drivers/gpu/nvgpu/pci.c index 648fc60e..a81090a2 100644 --- a/drivers/gpu/nvgpu/pci.c +++ b/drivers/gpu/nvgpu/pci.c @@ -17,12 +17,15 @@ #include #include #include -#include "pci.h" -#include "nvgpu_common.h" + +#include + #include "gk20a/gk20a.h" #include "gk20a/platform_gk20a.h" #include "clk/clk.h" +#include "pci.h" + #define PCI_INTERFACE_NAME "card-%s%%s" static int nvgpu_pci_tegra_probe(struct device *dev) -- cgit v1.2.2