From ab7280a2c13363146d92eba232715e15264d76f3 Mon Sep 17 00:00:00 2001 From: Vaikundanathan S Date: Fri, 31 Aug 2018 13:31:52 +0530 Subject: gpu:nvgpu: Update number of LUT entries CTRL_CLK_LUT_NUM_ENTRIES to 128 And fix build issues that appeared with 128 entries. Bug 2331655 Change-Id: If116bff14be9a1923e075f783fdb9a2e992208b8 Signed-off-by: Vaikundanathan S Reviewed-on: https://git-master.nvidia.com/r/1810493 Reviewed-on: https://git-master.nvidia.com/r/1813861 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/boardobj/boardobjgrp.c | 8 ++++---- drivers/gpu/nvgpu/boardobj/boardobjgrp.h | 2 +- drivers/gpu/nvgpu/clk/clk_fll.c | 2 +- drivers/gpu/nvgpu/ctrl/ctrlclkavfs.h | 4 +++- drivers/gpu/nvgpu/gp106/hal_gp106.c | 1 + drivers/gpu/nvgpu/gv100/hal_gv100.c | 1 + drivers/gpu/nvgpu/include/nvgpu/gk20a.h | 3 ++- drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmu_super_surf_if.h | 1 - drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuifclk.h | 2 +- 9 files changed, 14 insertions(+), 10 deletions(-) (limited to 'drivers') diff --git a/drivers/gpu/nvgpu/boardobj/boardobjgrp.c b/drivers/gpu/nvgpu/boardobj/boardobjgrp.c index 088c0e95..68320703 100644 --- a/drivers/gpu/nvgpu/boardobj/boardobjgrp.c +++ b/drivers/gpu/nvgpu/boardobj/boardobjgrp.c @@ -177,15 +177,15 @@ int boardobjgrp_destruct_super(struct boardobjgrp *pboardobjgrp) int boardobjgrp_pmucmd_construct_impl(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct boardobjgrp_pmu_cmd *cmd, u8 id, u8 msgid, - u8 hdrsize, u8 entrysize, u16 fbsize, u32 ss_offset, u8 rpc_func_id) + u16 hdrsize, u16 entrysize, u16 fbsize, u32 ss_offset, u8 rpc_func_id) { nvgpu_log_info(g, " "); /* Copy the parameters into the CMD*/ cmd->id = id; cmd->msgid = msgid; - cmd->hdrsize = hdrsize; - cmd->entrysize = entrysize; + cmd->hdrsize = (u8) hdrsize; + cmd->entrysize = (u8) entrysize; cmd->fbsize = fbsize; return 0; @@ -193,7 +193,7 @@ int boardobjgrp_pmucmd_construct_impl(struct gk20a *g, struct boardobjgrp int boardobjgrp_pmucmd_construct_impl_v1(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct boardobjgrp_pmu_cmd *cmd, u8 id, u8 msgid, - u8 hdrsize, u8 entrysize, u16 fbsize, u32 ss_offset, u8 rpc_func_id) + u16 hdrsize, u16 entrysize, u16 fbsize, u32 ss_offset, u8 rpc_func_id) { nvgpu_log_fn(g, " "); diff --git a/drivers/gpu/nvgpu/boardobj/boardobjgrp.h b/drivers/gpu/nvgpu/boardobj/boardobjgrp.h index 625e7912..095ff4c9 100644 --- a/drivers/gpu/nvgpu/boardobj/boardobjgrp.h +++ b/drivers/gpu/nvgpu/boardobj/boardobjgrp.h @@ -156,7 +156,7 @@ struct boardobjgrp_pmu { typedef int boardobjgrp_pmucmd_construct(struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct boardobjgrp_pmu_cmd *cmd, u8 id, u8 msgid, - u8 hdrsize, u8 entrysize, u16 fbsize, u32 ss_offset, u8 rpc_func_id); + u16 hdrsize, u16 entrysize, u16 fbsize, u32 ss_offset, u8 rpc_func_id); /* * Destroys BOARDOBJGRP PMU SW state. CMD. diff --git a/drivers/gpu/nvgpu/clk/clk_fll.c b/drivers/gpu/nvgpu/clk/clk_fll.c index 105457d7..e67dd350 100644 --- a/drivers/gpu/nvgpu/clk/clk_fll.c +++ b/drivers/gpu/nvgpu/clk/clk_fll.c @@ -151,7 +151,7 @@ int clk_fll_sw_setup(struct gk20a *g) pboardobjgrp->pmudatainstget = _clk_fll_devgrp_pmudata_instget; pboardobjgrp->pmustatusinstget = _clk_fll_devgrp_pmustatus_instget; pfllobjs = (struct avfsfllobjs *)pboardobjgrp; - pfllobjs->lut_num_entries = CTRL_CLK_LUT_NUM_ENTRIES; + pfllobjs->lut_num_entries = g->ops.clk.lut_num_entries; pfllobjs->lut_step_size_uv = CTRL_CLK_VIN_STEP_SIZE_UV; pfllobjs->lut_min_voltage_uv = CTRL_CLK_LUT_MIN_VOLTAGE_UV; diff --git a/drivers/gpu/nvgpu/ctrl/ctrlclkavfs.h b/drivers/gpu/nvgpu/ctrl/ctrlclkavfs.h index b01e4ffa..676ae7ec 100644 --- a/drivers/gpu/nvgpu/ctrl/ctrlclkavfs.h +++ b/drivers/gpu/nvgpu/ctrl/ctrlclkavfs.h @@ -59,7 +59,9 @@ BIT(CTRL_CLK_VIN_ID_GPC3) | \ BIT(CTRL_CLK_VIN_ID_GPC4) | \ BIT(CTRL_CLK_VIN_ID_GPC5)) -#define CTRL_CLK_LUT_NUM_ENTRIES (100) +#define CTRL_CLK_LUT_NUM_ENTRIES_MAX (128) +#define CTRL_CLK_LUT_NUM_ENTRIES_GV10x (128) +#define CTRL_CLK_LUT_NUM_ENTRIES_GP10x (100) #define CTRL_CLK_VIN_STEP_SIZE_UV (10000) #define CTRL_CLK_LUT_MIN_VOLTAGE_UV (450000) #define CTRL_CLK_FLL_TYPE_DISABLED 0 diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index 063fbbe3..94669eb3 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c @@ -887,6 +887,7 @@ int gp106_init_hal(struct gk20a *g) gops->clk.support_clk_freq_controller = true; gops->clk.support_pmgr_domain = true; gops->clk.support_lpwr_pg = true; + gops->clk.lut_num_entries = CTRL_CLK_LUT_NUM_ENTRIES_GP10x; g->name = "gp10x"; diff --git a/drivers/gpu/nvgpu/gv100/hal_gv100.c b/drivers/gpu/nvgpu/gv100/hal_gv100.c index 0c64ce58..63ab04e9 100644 --- a/drivers/gpu/nvgpu/gv100/hal_gv100.c +++ b/drivers/gpu/nvgpu/gv100/hal_gv100.c @@ -1007,6 +1007,7 @@ int gv100_init_hal(struct gk20a *g) gops->clk.support_clk_freq_controller = false; gops->clk.support_pmgr_domain = false; gops->clk.support_lpwr_pg = false; + gops->clk.lut_num_entries = CTRL_CLK_LUT_NUM_ENTRIES_GV10x; g->name = "gv10x"; diff --git a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h index e2a0cbf7..9799425e 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h +++ b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h @@ -852,7 +852,7 @@ struct gpu_ops { (struct gk20a *g, struct boardobjgrp *pboardobjgrp, struct boardobjgrp_pmu_cmd *cmd, u8 id, u8 msgid, - u8 hdrsize, u8 entrysize, u16 fbsize, u32 ss_offset, + u16 hdrsize, u16 entrysize, u16 fbsize, u32 ss_offset, u8 rpc_func_id); int (*boardobjgrp_pmuset_impl)(struct gk20a *g, struct boardobjgrp *pboardobjgrp); @@ -1113,6 +1113,7 @@ struct gpu_ops { bool support_pmgr_domain; bool support_lpwr_pg; u32 (*perf_pmu_vfe_load)(struct gk20a *g); + u32 lut_num_entries; } clk; struct { int (*arbiter_clk_init)(struct gk20a *g); diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmu_super_surf_if.h b/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmu_super_surf_if.h index c9a2750f..b0f9e101 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmu_super_surf_if.h +++ b/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmu_super_surf_if.h @@ -56,7 +56,6 @@ struct nv_pmu_super_surface { struct nv_pmu_clk_clk_vf_point_boardobj_grp_set clk_vf_point_grp_set; struct nv_pmu_clk_clk_vin_device_boardobj_grp_get_status clk_vin_device_grp_get_status; struct nv_pmu_clk_clk_fll_device_boardobj_grp_get_status clk_fll_device_grp_get_status; - u8 clk_rsvd1[0x800]; struct nv_pmu_clk_clk_vf_point_boardobj_grp_get_status clk_vf_point_grp_get_status; u8 clk_rsvd[0x4660]; } clk; diff --git a/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuifclk.h b/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuifclk.h index b94db25c..70a913b6 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuifclk.h +++ b/drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuifclk.h @@ -560,7 +560,7 @@ struct nv_pmu_clk_clk_fll_device_boardobj_get_status { u8 current_regime_id; bool b_dvco_min_reached; u16 min_freq_mhz; - struct nv_pmu_clk_lut_vf_entry lut_vf_curve[NV_UNSIGNED_ROUNDED_DIV(CTRL_CLK_LUT_NUM_ENTRIES, 2)]; + struct nv_pmu_clk_lut_vf_entry lut_vf_curve[NV_UNSIGNED_ROUNDED_DIV(CTRL_CLK_LUT_NUM_ENTRIES_MAX, 2)]; }; union nv_pmu_clk_clk_fll_device_boardobj_get_status_union { -- cgit v1.2.2