From 8b051f34fc10caa7309c0ae964fbc708d6a679a2 Mon Sep 17 00:00:00 2001 From: Seema Khowala Date: Fri, 14 Oct 2016 13:44:29 -0700 Subject: gpu: nvgpu: add func ptr for gpc exceptions Add function ptr for enabling gpc exceptions JIRA GV11B-28 JIRA GV11B-27 Change-Id: I4c7e4300825bf096c22f229ae7196f324ce40037 Signed-off-by: Seema Khowala Reviewed-on: http://git-master/r/1236902 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/gk20a.h | 1 + drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 6 ++++-- drivers/gpu/nvgpu/gk20a/gr_gk20a.h | 1 + drivers/gpu/nvgpu/gm20b/gr_gm20b.c | 1 + 4 files changed, 7 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 933ab4a9..8e0072de 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -275,6 +275,7 @@ struct gpu_ops { u32 *hww_global_esr); int (*handle_tex_exception)(struct gk20a *g, u32 gpc, u32 tpc, bool *post_event); + void (*enable_gpc_exceptions)(struct gk20a *g); void (*create_gr_sysfs)(struct device *dev); u32 (*get_lrf_tex_ltc_dram_override)(struct gk20a *g); int (*record_sm_error_state)(struct gk20a *g, diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 7f24747c..1a93d546 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c @@ -4502,7 +4502,7 @@ static int gr_gk20a_zcull_init_hw(struct gk20a *g, struct gr_gk20a *gr) return 0; } -static void gk20a_gr_enable_gpc_exceptions(struct gk20a *g) +void gk20a_gr_enable_gpc_exceptions(struct gk20a *g) { struct gr_gk20a *gr = &g->gr; u32 tpc_mask; @@ -4641,7 +4641,8 @@ static int gk20a_init_gr_setup_hw(struct gk20a *g) g->ops.gr.set_hww_esr_report_mask(g); /* enable TPC exceptions per GPC */ - gk20a_gr_enable_gpc_exceptions(g); + if (g->ops.gr.enable_gpc_exceptions) + g->ops.gr.enable_gpc_exceptions(g); /* TBD: ECC for L1/SM */ /* TBD: enable per BE exceptions */ @@ -9113,6 +9114,7 @@ void gk20a_init_gr_ops(struct gpu_ops *gops) gops->gr.mask_hww_warp_esr = gk20a_mask_hww_warp_esr; gops->gr.handle_sm_exception = gr_gk20a_handle_sm_exception; gops->gr.handle_tex_exception = gr_gk20a_handle_tex_exception; + gops->gr.enable_gpc_exceptions = gk20a_gr_enable_gpc_exceptions; gops->gr.get_lrf_tex_ltc_dram_override = NULL; gops->gr.update_smpc_ctxsw_mode = gr_gk20a_update_smpc_ctxsw_mode; gops->gr.update_hwpm_ctxsw_mode = gr_gk20a_update_hwpm_ctxsw_mode; diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h index 8c08459e..a0179b0d 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h @@ -657,6 +657,7 @@ int gr_gk20a_suspend_contexts(struct gk20a *g, int gr_gk20a_resume_contexts(struct gk20a *g, struct dbg_session_gk20a *dbg_s, int *ctx_resident_ch_fd); +void gk20a_gr_enable_gpc_exceptions(struct gk20a *g); static inline const char *gr_gk20a_graphics_preempt_mode_name(u32 graphics_preempt_mode) { diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c index 275224e7..a1d032e4 100644 --- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c @@ -1551,6 +1551,7 @@ void gm20b_init_gr(struct gpu_ops *gops) gops->gr.mask_hww_warp_esr = gk20a_mask_hww_warp_esr; gops->gr.handle_sm_exception = gr_gk20a_handle_sm_exception; gops->gr.handle_tex_exception = gr_gk20a_handle_tex_exception; + gops->gr.enable_gpc_exceptions = gk20a_gr_enable_gpc_exceptions; gops->gr.get_lrf_tex_ltc_dram_override = NULL; gops->gr.update_smpc_ctxsw_mode = gr_gk20a_update_smpc_ctxsw_mode; gops->gr.update_hwpm_ctxsw_mode = gr_gk20a_update_hwpm_ctxsw_mode; -- cgit v1.2.2