From 6c58737bed4477f3e3199956b29b3948a465c14d Mon Sep 17 00:00:00 2001 From: Deepak Nibade Date: Fri, 31 Mar 2017 18:27:00 +0530 Subject: gpu: nvgpu: use nvgpu list to store ch in TSG Use nvgpu list APIs instead of linux list APIs to store channel entries in TSG Jira NVGPU-13 Change-Id: I2f64fffc5c43487e1c9e6ccef59c60f079c09da4 Signed-off-by: Deepak Nibade Reviewed-on: http://git-master/r/1454014 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom --- drivers/gpu/nvgpu/gk20a/channel_gk20a.h | 9 ++++++++- drivers/gpu/nvgpu/gk20a/tsg_gk20a.c | 10 +++++----- drivers/gpu/nvgpu/gk20a/tsg_gk20a.h | 2 +- 3 files changed, 14 insertions(+), 7 deletions(-) (limited to 'drivers') diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.h b/drivers/gpu/nvgpu/gk20a/channel_gk20a.h index fd36ff1f..37b1d945 100644 --- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.h @@ -190,7 +190,7 @@ struct channel_gk20a { struct nvgpu_mutex ioctl_lock; int tsgid; - struct list_head ch_entry; /* channel's entry in TSG */ + struct nvgpu_list_node ch_entry; /* channel's entry in TSG */ struct channel_gk20a_joblist joblist; struct nvgpu_allocator fence_allocator; @@ -278,6 +278,13 @@ channel_gk20a_from_free_chs(struct nvgpu_list_node *node) ((uintptr_t)node - offsetof(struct channel_gk20a, free_chs)); }; +static inline struct channel_gk20a * +channel_gk20a_from_ch_entry(struct nvgpu_list_node *node) +{ + return (struct channel_gk20a *) + ((uintptr_t)node - offsetof(struct channel_gk20a, ch_entry)); +}; + static inline bool gk20a_channel_as_bound(struct channel_gk20a *ch) { return !!ch->vm; diff --git a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c index 1715c06a..cc3d94e4 100644 --- a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c @@ -44,7 +44,7 @@ int gk20a_enable_tsg(struct tsg_gk20a *tsg) struct channel_gk20a *ch; down_read(&tsg->ch_list_lock); - list_for_each_entry(ch, &tsg->ch_list, ch_entry) { + nvgpu_list_for_each_entry(ch, &tsg->ch_list, channel_gk20a, ch_entry) { g->ops.fifo.enable_channel(ch); } up_read(&tsg->ch_list_lock); @@ -58,7 +58,7 @@ int gk20a_disable_tsg(struct tsg_gk20a *tsg) struct channel_gk20a *ch; down_read(&tsg->ch_list_lock); - list_for_each_entry(ch, &tsg->ch_list, ch_entry) { + nvgpu_list_for_each_entry(ch, &tsg->ch_list, channel_gk20a, ch_entry) { g->ops.fifo.disable_channel(ch); } up_read(&tsg->ch_list_lock); @@ -127,7 +127,7 @@ int gk20a_tsg_bind_channel(struct tsg_gk20a *tsg, } down_write(&tsg->ch_list_lock); - list_add_tail(&ch->ch_entry, &tsg->ch_list); + nvgpu_list_add_tail(&ch->ch_entry, &tsg->ch_list); up_write(&tsg->ch_list_lock); kref_get(&tsg->refcount); @@ -145,7 +145,7 @@ int gk20a_tsg_unbind_channel(struct channel_gk20a *ch) struct tsg_gk20a *tsg = &f->tsg[ch->tsgid]; down_write(&tsg->ch_list_lock); - list_del_init(&ch->ch_entry); + nvgpu_list_del(&ch->ch_entry); up_write(&tsg->ch_list_lock); kref_put(&tsg->refcount, gk20a_tsg_release); @@ -168,7 +168,7 @@ int gk20a_init_tsg_support(struct gk20a *g, u32 tsgid) tsg->in_use = false; tsg->tsgid = tsgid; - INIT_LIST_HEAD(&tsg->ch_list); + nvgpu_init_list_node(&tsg->ch_list); init_rwsem(&tsg->ch_list_lock); INIT_LIST_HEAD(&tsg->event_id_list); diff --git a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.h b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.h index f95ae008..b1f1640e 100644 --- a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.h @@ -45,7 +45,7 @@ struct tsg_gk20a { struct kref refcount; - struct list_head ch_list; + struct nvgpu_list_node ch_list; int num_active_channels; struct rw_semaphore ch_list_lock; -- cgit v1.2.2