From 4f0e19d44dee9039378bce7bd0cfb11f36fd8926 Mon Sep 17 00:00:00 2001 From: Seema Khowala Date: Wed, 7 Jun 2017 13:17:22 -0700 Subject: gpu: nvgpu: gv11b: issue tsg preempt only Preempt type should be set to tsg and id should be set to tsgid in fifo_preempt_r(). Preempt type channel and id set to channel id does not initiate preemption. Bug 200289427 Bug 200292090 Bug 200289491 Change-Id: I2ae96c0b9ca8a88a8405f42775744f0879994887 Signed-off-by: Seema Khowala Reviewed-on: http://git-master/r/1497877 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom --- drivers/gpu/nvgpu/gv11b/fifo_gv11b.c | 35 +++++++++++++---------------------- drivers/gpu/nvgpu/gv11b/gr_gv11b.c | 13 ++++++++----- 2 files changed, 21 insertions(+), 27 deletions(-) (limited to 'drivers') diff --git a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c index 847bf172..90295f52 100644 --- a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c @@ -706,28 +706,13 @@ static int gv11b_fifo_is_preempt_pending(struct gk20a *g, u32 id, static int gv11b_fifo_preempt_channel(struct gk20a *g, u32 hw_chid) { struct fifo_gk20a *f = &g->fifo; - u32 ret = 0; - u32 token = PMU_INVALID_MUTEX_OWNER_ID; - u32 mutex_ret = 0; - u32 runlist_id; - - gk20a_dbg_fn("%d", hw_chid); - - runlist_id = f->channel[hw_chid].runlist_id; - gk20a_dbg_fn("runlist_id %d", runlist_id); - - nvgpu_mutex_acquire(&f->runlist_info[runlist_id].mutex); - - mutex_ret = nvgpu_pmu_mutex_acquire(&g->pmu, PMU_MUTEX_ID_FIFO, &token); - - ret = __locked_fifo_preempt(g, hw_chid, false); - - if (!mutex_ret) - nvgpu_pmu_mutex_release(&g->pmu, PMU_MUTEX_ID_FIFO, &token); + u32 tsgid; - nvgpu_mutex_release(&f->runlist_info[runlist_id].mutex); + tsgid = f->channel[hw_chid].tsgid; + nvgpu_log_info(g, "chid:%d tsgid:%d", hw_chid, tsgid); - return ret; + /* Preempt tsg. Channel preempt is NOOP */ + return g->ops.fifo.preempt_tsg(g, tsgid); } static int __locked_fifo_preempt_runlists(struct gk20a *g, u32 runlists_mask) @@ -818,9 +803,15 @@ static int __locked_fifo_preempt_ch_tsg(struct gk20a *g, u32 id, unsigned int id_type, unsigned int timeout_rc_type) { int ret; + struct fifo_gk20a *f = &g->fifo; - /* issue preempt */ - gk20a_fifo_issue_preempt(g, id, id_type); + nvgpu_log_fn(g, "id:%d id_type:%d", id, id_type); + + /* Issue tsg preempt. Channel preempt is noop */ + if (id_type == ID_TYPE_CHANNEL) + gk20a_fifo_issue_preempt(g, f->channel[id].tsgid, true); + else + gk20a_fifo_issue_preempt(g, id, true); /* wait for preempt */ ret = g->ops.fifo.is_preempt_pending(g, id, id_type, diff --git a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c index 503fb6f7..a703e72c 100644 --- a/drivers/gpu/nvgpu/gv11b/gr_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/gr_gv11b.c @@ -1593,12 +1593,15 @@ static int gr_gv11b_disable_channel_or_tsg(struct gk20a *g, struct channel_gk20a gk20a_dbg(gpu_dbg_fn | gpu_dbg_gpu_dbg | gpu_dbg_intr, "CILP: restarted runlist"); - if (gk20a_is_channel_marked_as_tsg(fault_ch)) + if (gk20a_is_channel_marked_as_tsg(fault_ch)) { gk20a_fifo_issue_preempt(g, fault_ch->tsgid, true); - else - gk20a_fifo_issue_preempt(g, fault_ch->hw_chid, false); - - gk20a_dbg(gpu_dbg_fn | gpu_dbg_gpu_dbg | gpu_dbg_intr, "CILP: preempted the channel/tsg"); + nvgpu_log(g, gpu_dbg_fn | gpu_dbg_gpu_dbg | gpu_dbg_intr, + "CILP: preempted the channel/tsg"); + } else { + nvgpu_log(g, gpu_dbg_fn | gpu_dbg_gpu_dbg | gpu_dbg_intr, + "CILP: tsgid is invalid, cannot preempt"); + WARN_ON(1); /* only TSG can be preempted */ + } return ret; } -- cgit v1.2.2