From 4cff26cd5b0096eeb26114cf36df8e2cb91821a8 Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Wed, 7 Sep 2016 15:09:54 -0700 Subject: gpu: nvgpu: Enable BLCG & SLCG on known dGPU JIRA DNVGPU-72 JIRA DNVGPU-73 Change-Id: I5932779f6913b55692f69fac692a1a66a9912fc4 Signed-off-by: Terje Bergstrom Reviewed-on: http://git-master/r/1216562 (cherry picked from commit d44be7714afa1f4257a81799c326b453da3d2d5a) Reviewed-on: http://git-master/r/1233350 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit --- drivers/gpu/nvgpu/pci.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'drivers') diff --git a/drivers/gpu/nvgpu/pci.c b/drivers/gpu/nvgpu/pci.c index e06fddd8..291a4057 100644 --- a/drivers/gpu/nvgpu/pci.c +++ b/drivers/gpu/nvgpu/pci.c @@ -63,16 +63,24 @@ static struct gk20a_platform nvgpu_pci_device = { .vidmem_is_vidmem = true, }; +#define NVGPU_PCI_ENABLE_BLCG BIT(0) +#define NVGPU_PCI_ENABLE_SLCG BIT(1) +#define NVGPU_PCI_ENABLE_ELCG BIT(2) + static struct pci_device_id nvgpu_pci_table[] = { { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, 0x1c36), .class = PCI_BASE_CLASS_DISPLAY << 16, .class_mask = 0xff << 16, + .driver_data = NVGPU_PCI_ENABLE_BLCG | + NVGPU_PCI_ENABLE_SLCG, }, { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, 0x1c37), .class = PCI_BASE_CLASS_DISPLAY << 16, .class_mask = 0xff << 16, + .driver_data = NVGPU_PCI_ENABLE_BLCG | + NVGPU_PCI_ENABLE_SLCG, }, {} }; @@ -201,6 +209,13 @@ static int nvgpu_pci_probe(struct pci_dev *pdev, platform->g = g; g->dev = &pdev->dev; + if (pent->driver_data & NVGPU_PCI_ENABLE_BLCG) + platform->enable_blcg = true; + if (pent->driver_data & NVGPU_PCI_ENABLE_SLCG) + platform->enable_slcg = true; + if (pent->driver_data & NVGPU_PCI_ENABLE_ELCG) + platform->enable_elcg = true; + err = pci_enable_device(pdev); if (err) return err; -- cgit v1.2.2