From 4851d71e92d3c2c9fa2991a6a50d0eded7cac81b Mon Sep 17 00:00:00 2001 From: Mahantesh Kumbar Date: Fri, 27 May 2016 11:04:59 +0530 Subject: gpu: nvgpu: align DMA base in chip HAL method align DMA base in chip HAL method instead in generic method. Bug N/A Change-Id: I47a250380e083f393677b65c13d0c2c894214ca7 Signed-off-by: Mahantesh Kumbar Reviewed-on: http://git-master/r/1154909 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu Reviewed-by: Terje Bergstrom --- drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'drivers') diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c index 64828a3f..51ffc552 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c @@ -960,13 +960,13 @@ static void pg_cmd_eng_buf_load_set_buf_size_v1(struct pmu_pg_cmd *pg, static void pg_cmd_eng_buf_load_set_dma_base_v0(struct pmu_pg_cmd *pg, u32 value) { - pg->eng_buf_load_v0.dma_base = value; + pg->eng_buf_load_v0.dma_base = (value >> 8); } static void pg_cmd_eng_buf_load_set_dma_base_v1(struct pmu_pg_cmd *pg, u32 value) { - pg->eng_buf_load_v1.dma_desc.dma_addr.lo |= u64_lo32(value << 8); - pg->eng_buf_load_v1.dma_desc.dma_addr.hi |= u64_hi32(value << 8); + pg->eng_buf_load_v1.dma_desc.dma_addr.lo |= u64_lo32(value); + pg->eng_buf_load_v1.dma_desc.dma_addr.hi |= u64_hi32(value); } static void pg_cmd_eng_buf_load_set_dma_offset_v0(struct pmu_pg_cmd *pg, @@ -2672,7 +2672,7 @@ int gk20a_init_pmu_bind_fecs(struct gk20a *g) g->ops.pmu_ver.pg_cmd_eng_buf_load_set_buf_size(&cmd.cmd.pg, pmu->pg_buf.size); g->ops.pmu_ver.pg_cmd_eng_buf_load_set_dma_base(&cmd.cmd.pg, - u64_lo32(pmu->pg_buf.gpu_va >> 8)); + u64_lo32(pmu->pg_buf.gpu_va)); g->ops.pmu_ver.pg_cmd_eng_buf_load_set_dma_offset(&cmd.cmd.pg, (u8)(pmu->pg_buf.gpu_va & 0xFF)); g->ops.pmu_ver.pg_cmd_eng_buf_load_set_dma_idx(&cmd.cmd.pg, @@ -2705,7 +2705,7 @@ static void pmu_setup_hw_load_zbc(struct gk20a *g) g->ops.pmu_ver.pg_cmd_eng_buf_load_set_buf_size(&cmd.cmd.pg, pmu->seq_buf.size); g->ops.pmu_ver.pg_cmd_eng_buf_load_set_dma_base(&cmd.cmd.pg, - u64_lo32(pmu->seq_buf.gpu_va >> 8)); + u64_lo32(pmu->seq_buf.gpu_va)); g->ops.pmu_ver.pg_cmd_eng_buf_load_set_dma_offset(&cmd.cmd.pg, (u8)(pmu->seq_buf.gpu_va & 0xFF)); g->ops.pmu_ver.pg_cmd_eng_buf_load_set_dma_idx(&cmd.cmd.pg, -- cgit v1.2.2