From 47e3d2e90511b1cba68e46233896a918b32b5d33 Mon Sep 17 00:00:00 2001 From: Thomas Fleury Date: Thu, 21 Apr 2016 16:35:44 -0700 Subject: gpu: nvgpu: fix engine reset in FECS trace In virtualization case, VM server is the only one allowed to write to ctxsw ring buffer. It will also generate an event in case of engine reset. Only generate a tracepoint on Guest OS side. EVLR-314 Change-Id: I2cb09780a9b41237fe196ef1f3515923f36a24a4 Signed-off-by: Thomas Fleury Reviewed-on: http://git-master/r/1130743 (cherry picked from commit 4bbf9538e2a3375eb86b2feea6c605c3eec2ca40) Reviewed-on: http://git-master/r/1133614 (cherry picked from commit 2076d944db41b37143c27795b3cffd88e99e0b00) Reviewed-on: http://git-master/r/1150046 Reviewed-by: Terje Bergstrom Tested-by: Terje Bergstrom --- drivers/gpu/nvgpu/gk20a/channel_gk20a.c | 4 +--- drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.c | 8 ++++---- drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 13 +++++++------ drivers/gpu/nvgpu/vgpu/fifo_vgpu.c | 2 +- 4 files changed, 13 insertions(+), 14 deletions(-) (limited to 'drivers') diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c index d99c48fb..69da03e1 100644 --- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c @@ -885,11 +885,9 @@ static void gk20a_free_channel(struct channel_gk20a *ch) mutex_lock(&g->fifo.gr_reset_mutex); /* if lock is already taken, a reset is taking place so no need to repeat */ - if (!was_reset) { - gk20a_ctxsw_trace_channel_reset(g, ch); + if (!was_reset) gk20a_fifo_reset_engine(g, g->fifo.deferred_fault_engines); - } mutex_unlock(&g->fifo.gr_reset_mutex); g->fifo.deferred_fault_engines = 0; g->fifo.deferred_reset_pending = false; diff --git a/drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.c b/drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.c index 3f39ced1..0fa9e65a 100644 --- a/drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.c @@ -626,16 +626,16 @@ void gk20a_ctxsw_trace_channel_reset(struct gk20a *g, struct channel_gk20a *ch) #ifdef CONFIG_GK20A_CTXSW_TRACE struct nvgpu_ctxsw_trace_entry entry = { .vmid = 0, - .tag = NVGPU_CTXSW_TAG_RESET, + .tag = NVGPU_CTXSW_TAG_ENGINE_RESET, .timestamp = gk20a_read_ptimer(g), .context_id = 0, .pid = ch->pid, }; gk20a_ctxsw_trace_write(g, &entry); + gk20a_ctxsw_trace_wake_up(g, 0); #endif trace_gk20a_channel_reset(ch->hw_chid, ch->tsgid); - gk20a_ctxsw_trace_wake_up(g, 0); } void gk20a_ctxsw_trace_tsg_reset(struct gk20a *g, struct tsg_gk20a *tsg) @@ -643,7 +643,7 @@ void gk20a_ctxsw_trace_tsg_reset(struct gk20a *g, struct tsg_gk20a *tsg) #ifdef CONFIG_GK20A_CTXSW_TRACE struct nvgpu_ctxsw_trace_entry entry = { .vmid = 0, - .tag = NVGPU_CTXSW_TAG_RESET, + .tag = NVGPU_CTXSW_TAG_ENGINE_RESET, .timestamp = gk20a_read_ptimer(g), .context_id = 0, .pid = 0, @@ -657,9 +657,9 @@ void gk20a_ctxsw_trace_tsg_reset(struct gk20a *g, struct tsg_gk20a *tsg) entry.pid = ch->pid; gk20a_ctxsw_trace_write(g, &entry); + gk20a_ctxsw_trace_wake_up(g, 0); #endif trace_gk20a_channel_reset(~0, tsg->tsgid); - gk20a_ctxsw_trace_wake_up(g, 0); } void gk20a_ctxsw_trace_init_ops(struct gpu_ops *ops) diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index b0e2ce1f..cf97b33a 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c @@ -1082,15 +1082,16 @@ static bool gk20a_fifo_handle_mmu_fault( mutex_lock(&g->fifo.gr_reset_mutex); /* if lock is already taken, a reset is taking place so no need to repeat */ - if (!was_reset) { - if (ch) - gk20a_ctxsw_trace_channel_reset(g, ch); - else - gk20a_ctxsw_trace_tsg_reset(g, tsg); + if (!was_reset) gk20a_fifo_reset_engine(g, engine_id); - } mutex_unlock(&g->fifo.gr_reset_mutex); } + + if (ch) + gk20a_ctxsw_trace_channel_reset(g, ch); + else if (tsg) + gk20a_ctxsw_trace_tsg_reset(g, tsg); + /* disable the channel/TSG from hw and increment * syncpoints */ diff --git a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c index 83fd65ff..8fcc7cc1 100644 --- a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c @@ -630,7 +630,7 @@ int vgpu_fifo_isr(struct gk20a *g, struct tegra_vgpu_fifo_intr_info *info) gk20a_err(dev_from_gk20a(g), "fifo intr (%d) on ch %u", info->type, info->chid); - gk20a_ctxsw_trace_channel_reset(g, ch); + trace_gk20a_channel_reset(ch->hw_chid, ch->tsgid); switch (info->type) { case TEGRA_VGPU_FIFO_INTR_PBDMA: -- cgit v1.2.2