From 27625718c4b2e400650885f8c892860c6c7434fd Mon Sep 17 00:00:00 2001 From: Peng Liu Date: Wed, 13 Mar 2019 10:30:54 -0700 Subject: Revert "gpu: nvgpu: cache gpu clk rate" This reverts commit e9a6d179a42e ("gpu: nvgpu: cache gpu clk rate") - Real clock rate doesn't always equal clock rate requested by caller - call of clk_set_rate() and update of cached_rate are not atomic - Real root cause for Bug 2051688 is in bpmp and gboost design Bug 2538692 Change-Id: I9248e0c69e2271ed2d0070587db59afa6f8160f2 Signed-off-by: Peng Liu Reviewed-on: https://git-master.nvidia.com/r/2109708 (cherry picked from commit cc70f89bb4efd106b81c2da5ecd6cbeb69c990d8) Reviewed-on: https://git-master.nvidia.com/r/2113647 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Aaron Tian Tested-by: Aaron Tian Reviewed-by: Bibek Basu Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/clk_gk20a.h | 5 +---- drivers/gpu/nvgpu/os/linux/clk.c | 19 +++++-------------- drivers/gpu/nvgpu/os/linux/platform_gk20a.h | 5 +---- drivers/gpu/nvgpu/os/linux/platform_gk20a_tegra.c | 4 +--- drivers/gpu/nvgpu/os/linux/platform_gp10b_tegra.c | 4 +--- 5 files changed, 9 insertions(+), 28 deletions(-) (limited to 'drivers') diff --git a/drivers/gpu/nvgpu/gk20a/clk_gk20a.h b/drivers/gpu/nvgpu/gk20a/clk_gk20a.h index d84e5969..03aa6ab7 100644 --- a/drivers/gpu/nvgpu/gk20a/clk_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/clk_gk20a.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2011 - 2018, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2011 - 2019, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -96,9 +96,6 @@ struct clk_gk20a { #if defined(CONFIG_COMMON_CLK) struct clk *tegra_clk; struct clk_hw hw; - - /* scaling rate */ - unsigned long cached_rate; #endif struct pll gpc_pll; struct pll gpc_pll_last; diff --git a/drivers/gpu/nvgpu/os/linux/clk.c b/drivers/gpu/nvgpu/os/linux/clk.c index 36c13577..6575a037 100644 --- a/drivers/gpu/nvgpu/os/linux/clk.c +++ b/drivers/gpu/nvgpu/os/linux/clk.c @@ -1,7 +1,7 @@ /* * Linux clock support * - * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -38,13 +38,9 @@ static unsigned long nvgpu_linux_clk_get_rate(struct gk20a *g, u32 api_domain) switch (api_domain) { case CTRL_CLK_DOMAIN_GPCCLK: if (g->clk.tegra_clk) - ret = g->clk.cached_rate ? - g->clk.cached_rate : - clk_get_rate(g->clk.tegra_clk); + ret = clk_get_rate(g->clk.tegra_clk); else - ret = platform->cached_rate ? - platform->cached_rate : - clk_get_rate(platform->clk[0]); + ret = clk_get_rate(platform->clk[0]); break; case CTRL_CLK_DOMAIN_PWRCLK: ret = clk_get_rate(platform->clk[1]); @@ -66,15 +62,10 @@ static int nvgpu_linux_clk_set_rate(struct gk20a *g, switch (api_domain) { case CTRL_CLK_DOMAIN_GPCCLK: - if (g->clk.tegra_clk) { + if (g->clk.tegra_clk) ret = clk_set_rate(g->clk.tegra_clk, rate); - if (!ret) - g->clk.cached_rate = rate; - } else { + else ret = clk_set_rate(platform->clk[0], rate); - if (!ret) - platform->cached_rate = rate; - } break; case CTRL_CLK_DOMAIN_PWRCLK: ret = clk_set_rate(platform->clk[1], rate); diff --git a/drivers/gpu/nvgpu/os/linux/platform_gk20a.h b/drivers/gpu/nvgpu/os/linux/platform_gk20a.h index a19d0a7c..1331c941 100644 --- a/drivers/gpu/nvgpu/os/linux/platform_gk20a.h +++ b/drivers/gpu/nvgpu/os/linux/platform_gk20a.h @@ -1,7 +1,7 @@ /* * GK20A Platform (SoC) Interface * - * Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2014-2019, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -271,9 +271,6 @@ struct gk20a_platform { /* stream id to use */ u32 ltc_streamid; - /* scaling rate */ - unsigned long cached_rate; - /* synchronized access to platform->clk_get_freqs */ struct nvgpu_mutex clk_get_freq_lock; }; diff --git a/drivers/gpu/nvgpu/os/linux/platform_gk20a_tegra.c b/drivers/gpu/nvgpu/os/linux/platform_gk20a_tegra.c index 408e546f..6a453096 100644 --- a/drivers/gpu/nvgpu/os/linux/platform_gk20a_tegra.c +++ b/drivers/gpu/nvgpu/os/linux/platform_gk20a_tegra.c @@ -1,7 +1,7 @@ /* * GK20A Tegra Platform Interface * - * Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2014-2019, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -497,8 +497,6 @@ static int gk20a_tegra_get_clocks(struct device *dev) rate = clk_round_rate(c, rate); clk_set_rate(c, rate); platform->clk[i] = c; - if (i == 0) - platform->cached_rate = rate; } platform->num_clks = i; diff --git a/drivers/gpu/nvgpu/os/linux/platform_gp10b_tegra.c b/drivers/gpu/nvgpu/os/linux/platform_gp10b_tegra.c index a8308496..c5527f2d 100644 --- a/drivers/gpu/nvgpu/os/linux/platform_gp10b_tegra.c +++ b/drivers/gpu/nvgpu/os/linux/platform_gp10b_tegra.c @@ -1,7 +1,7 @@ /* * GP10B Tegra Platform Interface * - * Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2014-2019, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -95,8 +95,6 @@ int gp10b_tegra_get_clocks(struct device *dev) } else { clk_set_rate(c, rate); platform->clk[i] = c; - if (i == 0) - platform->cached_rate = rate; } } platform->num_clks = i; -- cgit v1.2.2