From c5cf398b2aac7c725492033d02b1d9e778acd592 Mon Sep 17 00:00:00 2001 From: Richard Zhao Date: Thu, 31 May 2018 16:08:05 -0700 Subject: gpu: nvgpu: vgpu: clean up nonstall isrs It has moved to use TEGRA_VGPU_EVENT_SEMAPHORE_WAKEUP, removing legacy isrs. Jira EVLR-2696 Change-Id: Ie977bba59c0af8589989d872150c3f9b2080854a Signed-off-by: Richard Zhao Reviewed-on: https://git-master.nvidia.com/r/1736399 Reviewed-by: svc-mobile-coverity Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Thomas Fleury Reviewed-by: Terje Bergstrom Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h | 6 ------ drivers/gpu/nvgpu/include/nvgpu/vgpu/vgpu.h | 6 ------ drivers/gpu/nvgpu/vgpu/ce2_vgpu.c | 17 ----------------- drivers/gpu/nvgpu/vgpu/fifo_vgpu.c | 17 ----------------- drivers/gpu/nvgpu/vgpu/gr_vgpu.c | 17 ----------------- drivers/gpu/nvgpu/vgpu/vgpu.c | 9 --------- 6 files changed, 72 deletions(-) (limited to 'drivers/gpu') diff --git a/drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h b/drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h index 4e6f2cd1..1e2f516f 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h +++ b/drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h @@ -667,9 +667,6 @@ enum { TEGRA_VGPU_FIFO_INTR_PBDMA = 10, TEGRA_VGPU_FIFO_INTR_CTXSW_TIMEOUT = 11, TEGRA_VGPU_FIFO_INTR_MMU_FAULT = 12, - TEGRA_VGPU_GR_NONSTALL_INTR_SEMAPHORE = 13, - TEGRA_VGPU_FIFO_NONSTALL_INTR_CHANNEL = 14, - TEGRA_VGPU_CE2_NONSTALL_INTR_NONBLOCKPIPE = 15, TEGRA_VGPU_GR_INTR_SM_EXCEPTION = 16, }; @@ -737,9 +734,6 @@ enum { TEGRA_VGPU_INTR_GR = 0, TEGRA_VGPU_INTR_FIFO = 1, TEGRA_VGPU_INTR_CE2 = 2, - TEGRA_VGPU_NONSTALL_INTR_GR = 3, - TEGRA_VGPU_NONSTALL_INTR_FIFO = 4, - TEGRA_VGPU_NONSTALL_INTR_CE2 = 5, }; enum { diff --git a/drivers/gpu/nvgpu/include/nvgpu/vgpu/vgpu.h b/drivers/gpu/nvgpu/include/nvgpu/vgpu/vgpu.h index 046763dd..1e851b8e 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/vgpu/vgpu.h +++ b/drivers/gpu/nvgpu/include/nvgpu/vgpu/vgpu.h @@ -76,8 +76,6 @@ int vgpu_init_hal(struct gk20a *g); int vgpu_get_constants(struct gk20a *g); u64 vgpu_bar1_map(struct gk20a *g, struct nvgpu_mem *mem); int vgpu_gr_isr(struct gk20a *g, struct tegra_vgpu_gr_intr_info *info); -int vgpu_gr_nonstall_isr(struct gk20a *g, - struct tegra_vgpu_gr_nonstall_intr_info *info); int vgpu_gr_alloc_gr_ctx(struct gk20a *g, struct nvgpu_gr_ctx *gr_ctx, struct vm_gk20a *vm, @@ -89,10 +87,6 @@ void vgpu_gr_handle_sm_esr_event(struct gk20a *g, struct tegra_vgpu_sm_esr_info *info); int vgpu_gr_init_ctx_state(struct gk20a *g); int vgpu_fifo_isr(struct gk20a *g, struct tegra_vgpu_fifo_intr_info *info); -int vgpu_fifo_nonstall_isr(struct gk20a *g, - struct tegra_vgpu_fifo_nonstall_intr_info *info); -int vgpu_ce2_nonstall_isr(struct gk20a *g, - struct tegra_vgpu_ce2_nonstall_intr_info *info); u32 vgpu_ce_get_num_pce(struct gk20a *g); int vgpu_init_mm_support(struct gk20a *g); int vgpu_init_gr_support(struct gk20a *g); diff --git a/drivers/gpu/nvgpu/vgpu/ce2_vgpu.c b/drivers/gpu/nvgpu/vgpu/ce2_vgpu.c index 563c3a2b..aa3783b9 100644 --- a/drivers/gpu/nvgpu/vgpu/ce2_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/ce2_vgpu.c @@ -27,23 +27,6 @@ #include #include -int vgpu_ce2_nonstall_isr(struct gk20a *g, - struct tegra_vgpu_ce2_nonstall_intr_info *info) -{ - nvgpu_log_fn(g, " "); - - switch (info->type) { - case TEGRA_VGPU_CE2_NONSTALL_INTR_NONBLOCKPIPE: - g->ops.semaphore_wakeup(g, true); - break; - default: - WARN_ON(1); - break; - } - - return 0; -} - u32 vgpu_ce_get_num_pce(struct gk20a *g) { struct vgpu_priv_data *priv = vgpu_get_priv_data(g); diff --git a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c index eb25cf3a..b0388fae 100644 --- a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c @@ -753,23 +753,6 @@ int vgpu_fifo_isr(struct gk20a *g, struct tegra_vgpu_fifo_intr_info *info) return 0; } -int vgpu_fifo_nonstall_isr(struct gk20a *g, - struct tegra_vgpu_fifo_nonstall_intr_info *info) -{ - nvgpu_log_fn(g, " "); - - switch (info->type) { - case TEGRA_VGPU_FIFO_NONSTALL_INTR_CHANNEL: - g->ops.semaphore_wakeup(g, false); - break; - default: - WARN_ON(1); - break; - } - - return 0; -} - u32 vgpu_fifo_default_timeslice_us(struct gk20a *g) { struct vgpu_priv_data *priv = vgpu_get_priv_data(g); diff --git a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c index a512c36b..2ae615bf 100644 --- a/drivers/gpu/nvgpu/vgpu/gr_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/gr_vgpu.c @@ -987,23 +987,6 @@ int vgpu_gr_isr(struct gk20a *g, struct tegra_vgpu_gr_intr_info *info) return 0; } -int vgpu_gr_nonstall_isr(struct gk20a *g, - struct tegra_vgpu_gr_nonstall_intr_info *info) -{ - nvgpu_log_fn(g, " "); - - switch (info->type) { - case TEGRA_VGPU_GR_NONSTALL_INTR_SEMAPHORE: - g->ops.semaphore_wakeup(g, true); - break; - default: - WARN_ON(1); - break; - } - - return 0; -} - int vgpu_gr_set_sm_debug_mode(struct gk20a *g, struct channel_gk20a *ch, u64 sms, bool enable) { diff --git a/drivers/gpu/nvgpu/vgpu/vgpu.c b/drivers/gpu/nvgpu/vgpu/vgpu.c index 17e80cd7..2bdef427 100644 --- a/drivers/gpu/nvgpu/vgpu/vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/vgpu.c @@ -164,17 +164,8 @@ int vgpu_intr_thread(void *dev_id) case TEGRA_VGPU_EVENT_INTR: if (msg->unit == TEGRA_VGPU_INTR_GR) vgpu_gr_isr(g, &msg->info.gr_intr); - else if (msg->unit == TEGRA_VGPU_NONSTALL_INTR_GR) - vgpu_gr_nonstall_isr(g, - &msg->info.gr_nonstall_intr); else if (msg->unit == TEGRA_VGPU_INTR_FIFO) vgpu_fifo_isr(g, &msg->info.fifo_intr); - else if (msg->unit == TEGRA_VGPU_NONSTALL_INTR_FIFO) - vgpu_fifo_nonstall_isr(g, - &msg->info.fifo_nonstall_intr); - else if (msg->unit == TEGRA_VGPU_NONSTALL_INTR_CE2) - vgpu_ce2_nonstall_isr(g, - &msg->info.ce2_nonstall_intr); break; #ifdef CONFIG_GK20A_CTXSW_TRACE case TEGRA_VGPU_EVENT_FECS_TRACE: -- cgit v1.2.2