From b51ffba58f83f0324e22884906fcb70d055c287a Mon Sep 17 00:00:00 2001
From: Deepak Nibade <dnibade@nvidia.com>
Date: Wed, 23 Dec 2015 15:56:50 +0530
Subject: gpu: nvgpu: API to extract context id

Add new API gr_gk20a_get_ctx_id() to get/extract
context id from GR context

Bug 200156699

Change-Id: If0e8887a9a6b139cd795bf03f5def64fd664d12b
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/927130
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
---
 drivers/gpu/nvgpu/gk20a/gr_gk20a.c            | 25 +++++++++++++++++++++++++
 drivers/gpu/nvgpu/gk20a/gr_gk20a.h            |  4 ++++
 drivers/gpu/nvgpu/gk20a/hw_ctxsw_prog_gk20a.h |  4 ++++
 drivers/gpu/nvgpu/gm20b/hw_ctxsw_prog_gm20b.h |  4 ++++
 4 files changed, 37 insertions(+)

(limited to 'drivers/gpu')

diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index 7f02dc43..bfb11566 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -86,6 +86,31 @@ static int gr_gk20a_init_golden_ctx_image(struct gk20a *g,
 /*elcg init */
 static void gr_gk20a_enable_elcg(struct gk20a *g);
 
+int gr_gk20a_get_ctx_id(struct gk20a *g,
+		struct channel_gk20a *c,
+		u32 *ctx_id)
+{
+	struct channel_ctx_gk20a *ch_ctx = &c->ch_ctx;
+	void *ctx_ptr = NULL;
+
+	/* Channel gr_ctx buffer is gpu cacheable.
+	   Flush and invalidate before cpu update. */
+	g->ops.mm.l2_flush(g, true);
+
+	ctx_ptr = vmap(ch_ctx->gr_ctx->mem.pages,
+			PAGE_ALIGN(ch_ctx->gr_ctx->mem.size) >> PAGE_SHIFT,
+			0, pgprot_writecombine(PAGE_KERNEL));
+	if (!ctx_ptr)
+		return -ENOMEM;
+
+	*ctx_id = gk20a_mem_rd32(ctx_ptr +
+				 ctxsw_prog_main_image_context_id_o(), 0);
+
+	vunmap(ctx_ptr);
+
+	return 0;
+}
+
 void gk20a_fecs_dump_falcon_stats(struct gk20a *g)
 {
 	int i;
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
index 29c2dcf6..74da0cf1 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
@@ -562,4 +562,8 @@ int gr_gk20a_ctx_wait_ucode(struct gk20a *g, u32 mailbox_id,
 			    u32 mailbox_ok, u32 opc_fail,
 			    u32 mailbox_fail, bool sleepduringwait);
 
+int gr_gk20a_get_ctx_id(struct gk20a *g,
+		struct channel_gk20a *c,
+		u32 *ctx_id);
+
 #endif /*__GR_GK20A_H__*/
diff --git a/drivers/gpu/nvgpu/gk20a/hw_ctxsw_prog_gk20a.h b/drivers/gpu/nvgpu/gk20a/hw_ctxsw_prog_gk20a.h
index 4e3fae13..39cbbb58 100644
--- a/drivers/gpu/nvgpu/gk20a/hw_ctxsw_prog_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/hw_ctxsw_prog_gk20a.h
@@ -242,4 +242,8 @@ static inline u32 ctxsw_prog_main_image_misc_options_verif_features_disabled_f(v
 {
 	return 0x0;
 }
+static inline u32 ctxsw_prog_main_image_context_id_o(void)
+{
+	return 0x000000f0;
+}
 #endif
diff --git a/drivers/gpu/nvgpu/gm20b/hw_ctxsw_prog_gm20b.h b/drivers/gpu/nvgpu/gm20b/hw_ctxsw_prog_gm20b.h
index 34f8a6a4..d01667bc 100644
--- a/drivers/gpu/nvgpu/gm20b/hw_ctxsw_prog_gm20b.h
+++ b/drivers/gpu/nvgpu/gm20b/hw_ctxsw_prog_gm20b.h
@@ -270,4 +270,8 @@ static inline u32 ctxsw_prog_main_image_preemption_options_control_cta_enabled_f
 {
 	return 0x1;
 }
+static inline u32 ctxsw_prog_main_image_context_id_o(void)
+{
+	return 0x000000f0;
+}
 #endif
-- 
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