From 9907b97985c47003a179c4357274b737cc0699ee Mon Sep 17 00:00:00 2001 From: Sunny He Date: Tue, 27 Jun 2017 15:09:05 -0700 Subject: gpu: nvgpu: Reorg ce2 HAL initialization Reorganize HAL initialization to remove inheritance and construct the gpu_ops struct at compile time. This patch only covers the ce2 sub-module of the gpu_ops struct. Perform HAL function assignments in hal_gxxxx.c through the population of a chip-specific copy of gpu_ops. Jira NVGPU-74 Change-Id: I7dfd5e8dcd4d6f3623d1b795b6b2e15ff356a13a Signed-off-by: Sunny He Reviewed-on: https://git-master.nvidia.com/r/1509632 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom --- drivers/gpu/nvgpu/Makefile.nvgpu | 1 - drivers/gpu/nvgpu/gk20a/ce2_gk20a.c | 5 ----- drivers/gpu/nvgpu/gk20a/ce2_gk20a.h | 1 - drivers/gpu/nvgpu/gm20b/ce2_gm20b.c | 28 ---------------------------- drivers/gpu/nvgpu/gm20b/ce2_gm20b.h | 29 ----------------------------- drivers/gpu/nvgpu/gm20b/hal_gm20b.c | 8 ++++++-- drivers/gpu/nvgpu/gp106/hal_gp106.c | 6 +++++- drivers/gpu/nvgpu/gp10b/ce_gp10b.c | 7 +------ drivers/gpu/nvgpu/gp10b/ce_gp10b.h | 4 ++-- drivers/gpu/nvgpu/gp10b/hal_gp10b.c | 6 +++++- 10 files changed, 19 insertions(+), 76 deletions(-) delete mode 100644 drivers/gpu/nvgpu/gm20b/ce2_gm20b.c delete mode 100644 drivers/gpu/nvgpu/gm20b/ce2_gm20b.h (limited to 'drivers/gpu') diff --git a/drivers/gpu/nvgpu/Makefile.nvgpu b/drivers/gpu/nvgpu/Makefile.nvgpu index c754fbd4..ffe78097 100644 --- a/drivers/gpu/nvgpu/Makefile.nvgpu +++ b/drivers/gpu/nvgpu/Makefile.nvgpu @@ -99,7 +99,6 @@ nvgpu-y := \ gm20b/hal_gm20b.o \ gm20b/bus_gm20b.o \ gm20b/ltc_gm20b.o \ - gm20b/ce2_gm20b.o \ gm20b/gr_gm20b.o \ gm20b/clk_gm20b.o \ gm20b/fb_gm20b.o \ diff --git a/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c index b0f65647..f50fec13 100644 --- a/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c @@ -82,11 +82,6 @@ int gk20a_ce2_nonstall_isr(struct gk20a *g, u32 inst_id, u32 pri_base) } return ops; } -void gk20a_init_ce2(struct gpu_ops *gops) -{ - gops->ce2.isr_stall = gk20a_ce2_isr; - gops->ce2.isr_nonstall = gk20a_ce2_nonstall_isr; -} /* static CE app api */ static void gk20a_ce_notify_all_user(struct gk20a *g, u32 event) diff --git a/drivers/gpu/nvgpu/gk20a/ce2_gk20a.h b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.h index 93905ab9..03117043 100644 --- a/drivers/gpu/nvgpu/gk20a/ce2_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.h @@ -24,7 +24,6 @@ #include "channel_gk20a.h" #include "tsg_gk20a.h" -void gk20a_init_ce2(struct gpu_ops *gops); void gk20a_ce2_isr(struct gk20a *g, u32 inst_id, u32 pri_base); int gk20a_ce2_nonstall_isr(struct gk20a *g, u32 inst_id, u32 pri_base); diff --git a/drivers/gpu/nvgpu/gm20b/ce2_gm20b.c b/drivers/gpu/nvgpu/gm20b/ce2_gm20b.c deleted file mode 100644 index a90a9b5b..00000000 --- a/drivers/gpu/nvgpu/gm20b/ce2_gm20b.c +++ /dev/null @@ -1,28 +0,0 @@ -/* - * GK20A Graphics Copy Engine (gr host) - * - * Copyright (c) 2011-2015, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. - */ - -/*TODO: remove uncecessary */ -#include "gk20a/gk20a.h" -#include "ce2_gm20b.h" - -void gm20b_init_ce2(struct gpu_ops *gops) -{ - gops->ce2.isr_stall = gk20a_ce2_isr; - gops->ce2.isr_nonstall = gk20a_ce2_nonstall_isr; -} diff --git a/drivers/gpu/nvgpu/gm20b/ce2_gm20b.h b/drivers/gpu/nvgpu/gm20b/ce2_gm20b.h deleted file mode 100644 index 10d7ef8c..00000000 --- a/drivers/gpu/nvgpu/gm20b/ce2_gm20b.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * drivers/video/tegra/host/gk20a/fifo_gk20a.h - * - * GK20A graphics copy engine (gr host) - * - * Copyright (c) 2011-2015, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. - */ -#ifndef __CE2_GM20B_H__ -#define __CE2_GM20B_H__ - -#include "gk20a/channel_gk20a.h" -#include "gk20a/tsg_gk20a.h" - -void gm20b_init_ce2(struct gpu_ops *gops); - -#endif /*__CE2_GM20B_H__*/ diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c index 228e1a97..c89f3746 100644 --- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c @@ -14,6 +14,7 @@ */ #include "gk20a/gk20a.h" +#include "gk20a/ce2_gk20a.h" #include "gk20a/dbg_gpu_gk20a.h" #include "gk20a/fifo_gk20a.h" #include "gk20a/css_gr_gk20a.h" @@ -24,7 +25,6 @@ #include "gk20a/regops_gk20a.h" #include "ltc_gm20b.h" -#include "ce2_gm20b.h" #include "gr_gm20b.h" #include "ltc_gm20b.h" #include "fb_gm20b.h" @@ -158,6 +158,10 @@ static const struct gpu_ops gm20b_ops = { .sync_debugfs = gm20b_ltc_sync_debugfs, #endif }, + .ce2 = { + .isr_stall = gk20a_ce2_isr, + .isr_nonstall = gk20a_ce2_nonstall_isr, + }, .clock_gating = { .slcg_bus_load_gating_prod = gm20b_slcg_bus_load_gating_prod, @@ -332,6 +336,7 @@ int gm20b_init_hal(struct gk20a *g) u32 val; gops->ltc = gm20b_ops.ltc; + gops->ce2 = gm20b_ops.ce2; gops->clock_gating = gm20b_ops.clock_gating; gops->fifo = gm20b_ops.fifo; gops->mc = gm20b_ops.mc; @@ -384,7 +389,6 @@ int gm20b_init_hal(struct gk20a *g) g->bootstrap_owner = LSF_BOOTSTRAP_OWNER_DEFAULT; gm20b_init_gr(g); gm20b_init_fb(gops); - gm20b_init_ce2(gops); gm20b_init_gr_ctx(gops); gm20b_init_mm(gops); gm20b_init_pmu_ops(g); diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index 49c4b358..227b22e6 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c @@ -203,6 +203,10 @@ static const struct gpu_ops gp106_ops = { .sync_debugfs = gp10b_ltc_sync_debugfs, #endif }, + .ce2 = { + .isr_stall = gp10b_ce_isr, + .isr_nonstall = gp10b_ce_nonstall_isr, + }, .clock_gating = { .slcg_bus_load_gating_prod = gp106_slcg_bus_load_gating_prod, @@ -396,6 +400,7 @@ int gp106_init_hal(struct gk20a *g) gk20a_dbg_fn(""); gops->ltc = gp106_ops.ltc; + gops->ce2 = gp106_ops.ce2; gops->clock_gating = gp106_ops.clock_gating; gops->fifo = gp106_ops.fifo; gops->mc = gp106_ops.mc; @@ -424,7 +429,6 @@ int gp106_init_hal(struct gk20a *g) gp106_init_gr(g); gp10b_init_fecs_trace_ops(gops); gp106_init_fb(gops); - gp10b_init_ce(gops); gp106_init_gr_ctx(gops); gp106_init_mm(gops); gp106_init_pmu_ops(g); diff --git a/drivers/gpu/nvgpu/gp10b/ce_gp10b.c b/drivers/gpu/nvgpu/gp10b/ce_gp10b.c index 1fff37fb..59a6ee21 100644 --- a/drivers/gpu/nvgpu/gp10b/ce_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/ce_gp10b.c @@ -54,7 +54,7 @@ void gp10b_ce_isr(struct gk20a *g, u32 inst_id, u32 pri_base) return; } -static int gp10b_ce_nonstall_isr(struct gk20a *g, u32 inst_id, u32 pri_base) +int gp10b_ce_nonstall_isr(struct gk20a *g, u32 inst_id, u32 pri_base) { int ops = 0; u32 ce_intr = gk20a_readl(g, ce_intr_status_r(inst_id)); @@ -70,8 +70,3 @@ static int gp10b_ce_nonstall_isr(struct gk20a *g, u32 inst_id, u32 pri_base) return ops; } -void gp10b_init_ce(struct gpu_ops *gops) -{ - gops->ce2.isr_stall = gp10b_ce_isr; - gops->ce2.isr_nonstall = gp10b_ce_nonstall_isr; -} diff --git a/drivers/gpu/nvgpu/gp10b/ce_gp10b.h b/drivers/gpu/nvgpu/gp10b/ce_gp10b.h index 134c2ddb..f88e0ae1 100644 --- a/drivers/gpu/nvgpu/gp10b/ce_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/ce_gp10b.h @@ -1,7 +1,7 @@ /* * Pascal GPU series Copy Engine. * - * Copyright (c) 2011-2016, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2011-2017, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -21,7 +21,7 @@ #include "gk20a/channel_gk20a.h" #include "gk20a/tsg_gk20a.h" -void gp10b_init_ce(struct gpu_ops *gops); void gp10b_ce_isr(struct gk20a *g, u32 inst_id, u32 pri_base); +int gp10b_ce_nonstall_isr(struct gk20a *g, u32 inst_id, u32 pri_base); #endif /*__CE2_GP10B_H__*/ diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c index 6b4fbf40..feac284b 100644 --- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c @@ -165,6 +165,10 @@ static const struct gpu_ops gp10b_ops = { .sync_debugfs = gp10b_ltc_sync_debugfs, #endif }, + .ce2 = { + .isr_stall = gp10b_ce_isr, + .isr_nonstall = gp10b_ce_nonstall_isr, + }, .clock_gating = { .slcg_bus_load_gating_prod = gp10b_slcg_bus_load_gating_prod, @@ -345,6 +349,7 @@ int gp10b_init_hal(struct gk20a *g) u32 val; gops->ltc = gp10b_ops.ltc; + gops->ce2 = gp10b_ops.ce2; gops->clock_gating = gp10b_ops.clock_gating; gops->fifo = gp10b_ops.fifo; gops->mc = gp10b_ops.mc; @@ -407,7 +412,6 @@ int gp10b_init_hal(struct gk20a *g) gp10b_init_gr(g); gp10b_init_fecs_trace_ops(gops); gp10b_init_fb(gops); - gp10b_init_ce(gops); gp10b_init_gr_ctx(gops); gp10b_init_mm(gops); gp10b_init_pmu_ops(g); -- cgit v1.2.2