From 945e5e6832bd2461b9eafa61e8dd06b793a6f6b9 Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Wed, 3 Dec 2014 09:35:37 +0200 Subject: gpu: nvgpu: gp10b: Correct SMMU bit number Bit 36 is the correct bit to indicate SMMU translation. Bug 1580756 Change-Id: I761e70265d5981b07940f1d43716416829993827 Signed-off-by: Terje Bergstrom Reviewed-on: http://git-master/r/658827 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Hiroshi Doyu --- drivers/gpu/nvgpu/gp10b/mm_gp10b.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/gpu') diff --git a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c b/drivers/gpu/nvgpu/gp10b/mm_gp10b.c index a0b6a7d1..ff248f51 100644 --- a/drivers/gpu/nvgpu/gp10b/mm_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/mm_gp10b.c @@ -18,7 +18,7 @@ u32 gp10b_mm_get_physical_addr_bits(struct gk20a *g) { - return 37; + return 36; } void gp10b_init_mm(struct gpu_ops *gops) -- cgit v1.2.2