From 92f6eb016cc759b24e249ed6c17cff537cc35db7 Mon Sep 17 00:00:00 2001 From: Sunny He Date: Tue, 27 Jun 2017 16:08:48 -0700 Subject: gpu: nvgpu: Remove pmupstate flag from gpu_ops Replace pmupstate boolean flag in gpu_ops with entry in common flag system. The new common flag is NVGPU_PMU_PSTATE Jira NVGPU-74 Change-Id: I4e1ba922a48145b1cf3488b6f14fde78107adb5b Signed-off-by: Sunny He Reviewed-on: https://git-master.nvidia.com/r/1514059 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Alex Waterman GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu --- drivers/gpu/nvgpu/gk20a/gk20a.c | 6 +++--- drivers/gpu/nvgpu/gk20a/gk20a.h | 1 - drivers/gpu/nvgpu/gm20b/hal_gm20b.c | 2 +- drivers/gpu/nvgpu/gp106/hal_gp106.c | 4 ++-- drivers/gpu/nvgpu/gp10b/hal_gp10b.c | 3 ++- drivers/gpu/nvgpu/include/nvgpu/enabled.h | 1 + 6 files changed, 9 insertions(+), 8 deletions(-) (limited to 'drivers/gpu') diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c index 32441c5b..21e861fe 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gk20a.c @@ -138,7 +138,7 @@ int gk20a_prepare_poweroff(struct gk20a *g) ret |= g->ops.clk.suspend_clk_support(g); #ifdef CONFIG_ARCH_TEGRA_18x_SOC - if (g->ops.pmupstate) + if (nvgpu_is_enabled(g, NVGPU_PMU_PSTATE)) gk20a_deinit_pstate_support(g); #endif g->power_on = false; @@ -252,7 +252,7 @@ int gk20a_finalize_poweron(struct gk20a *g) } #ifdef CONFIG_ARCH_TEGRA_18x_SOC - if (g->ops.pmupstate) { + if (nvgpu_is_enabled(g, NVGPU_PMU_PSTATE)) { err = gk20a_init_pstate_support(g); if (err) { nvgpu_err(g, "failed to init pstates"); @@ -276,7 +276,7 @@ int gk20a_finalize_poweron(struct gk20a *g) } #ifdef CONFIG_ARCH_TEGRA_18x_SOC - if (g->ops.pmupstate) { + if (nvgpu_is_enabled(g, NVGPU_PMU_PSTATE)) { err = gk20a_init_pstate_pmu_support(g); if (err) { nvgpu_err(g, "failed to init pstates"); diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index ff8eb988..17a06099 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -994,7 +994,6 @@ struct gpu_ops { } priv_ring; bool privsecurity; bool securegpccs; - bool pmupstate; }; struct nvgpu_bios_ucode { diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c index bdee1149..7415e6c1 100644 --- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c @@ -352,7 +352,7 @@ int gm20b_init_hal(struct gk20a *g) gops->get_litter_value = gm20b_ops.get_litter_value; gops->securegpccs = false; - gops->pmupstate = false; + __nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, false); #ifdef CONFIG_TEGRA_ACR if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL)) { gops->privsecurity = 1; diff --git a/drivers/gpu/nvgpu/gp106/hal_gp106.c b/drivers/gpu/nvgpu/gp106/hal_gp106.c index fa767c3b..2a661734 100644 --- a/drivers/gpu/nvgpu/gp106/hal_gp106.c +++ b/drivers/gpu/nvgpu/gp106/hal_gp106.c @@ -62,6 +62,7 @@ #include #include #include +#include #include #include @@ -417,8 +418,7 @@ int gp106_init_hal(struct gk20a *g) gops->privsecurity = 1; gops->securegpccs = 1; - gops->pmupstate = true; - + __nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, true); g->bootstrap_owner = LSF_FALCON_ID_SEC2; gp106_init_gr(gops); diff --git a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c index d603703b..177a7c9f 100644 --- a/drivers/gpu/nvgpu/gp10b/hal_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/hal_gp10b.c @@ -364,7 +364,8 @@ int gp10b_init_hal(struct gk20a *g) gp10b_ops.chip_init_gpu_characteristics; gops->get_litter_value = gp10b_ops.get_litter_value; - gops->pmupstate = false; + __nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, false); + #ifdef CONFIG_TEGRA_ACR if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL)) { gops->privsecurity = 0; diff --git a/drivers/gpu/nvgpu/include/nvgpu/enabled.h b/drivers/gpu/nvgpu/include/nvgpu/enabled.h index 3bfd4899..6fa7dcfa 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/enabled.h +++ b/drivers/gpu/nvgpu/include/nvgpu/enabled.h @@ -42,6 +42,7 @@ struct gk20a; */ /* perfmon enabled or disabled for PMU */ #define NVGPU_PMU_PERFMON 48 +#define NVGPU_PMU_PSTATE 49 /* * Must be greater than the largest bit offset in the above list. -- cgit v1.2.2