From 8cb168632bef46e98da7ff5d16b03e03ddfd3d4e Mon Sep 17 00:00:00 2001 From: prsethi Date: Sun, 18 Oct 2020 19:16:00 +0000 Subject: gpu: nvgpu: add support for ACB SLCG on gv11b Register list for ACB SLCG is auto generated with scripts. Add HAL operations to enable/disable ACB clock gating. Cherry-pick/manually port from dev-main Bug 200647909 Change-Id: I4be4c14cc072fcccd91031a5a40321f5ff11f549 Signed-off-by: Prateek sethi Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2420355 (cherry picked from commit c7c04d3a28c2eb0edc8e015dd0130fa50d3496c7) Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2434464 Reviewed-by: automaticguardword Reviewed-by: Rajesh Devaraj Reviewed-by: Peter Daifuku Reviewed-by: Phoenix Jung Reviewed-by: mobile promotions Tested-by: mobile promotions GVS: Gerrit_Virtual_Submit --- .../common/clock_gating/gv11b_gating_reglist.c | 23 +++++++++++++++++++++- .../common/clock_gating/gv11b_gating_reglist.h | 5 ++++- drivers/gpu/nvgpu/gk20a/gk20a.c | 6 +++++- drivers/gpu/nvgpu/gv11b/hal_gv11b.c | 2 ++ drivers/gpu/nvgpu/include/nvgpu/gk20a.h | 1 + 5 files changed, 34 insertions(+), 3 deletions(-) (limited to 'drivers/gpu') diff --git a/drivers/gpu/nvgpu/common/clock_gating/gv11b_gating_reglist.c b/drivers/gpu/nvgpu/common/clock_gating/gv11b_gating_reglist.c index 57b1443b..5ab890ad 100644 --- a/drivers/gpu/nvgpu/common/clock_gating/gv11b_gating_reglist.c +++ b/drivers/gpu/nvgpu/common/clock_gating/gv11b_gating_reglist.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014-2019, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2014-2020, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -162,6 +162,11 @@ static const struct gating_desc gv11b_slcg_hshub[] = { {.addr = 0x001fbbf4U, .prod = 0x00000000U, .disable = 0xfffffffeU}, }; +/* slcg Acb */ +static const struct gating_desc gv11b_slcg_acb[] = { + {.addr = 0x0010e48cU, .prod = 0x00000038U, .disable = 0x0000003eU}, +}; + /* blcg bus */ static const struct gating_desc gv11b_blcg_bus[] = { {.addr = 0x00001c00U, .prod = 0x00000042U, .disable = 0x00000000U}, @@ -513,6 +518,22 @@ void gv11b_slcg_hshub_load_gating_prod(struct gk20a *g, } } +void gv11b_slcg_acb_load_gating_prod(struct gk20a *g, + bool prod) +{ + u32 i; + u32 size = (u32)(sizeof(gv11b_slcg_acb) / GATING_DESC_SIZE); + + if (nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG)) { + for (i = 0; i < size; i++) { + u32 reg = gv11b_slcg_acb[i].addr; + u32 val = prod ? gv11b_slcg_acb[i].prod : + gv11b_slcg_acb[i].disable; + gk20a_writel(g, reg, val); + } + } +} + void gv11b_blcg_bus_load_gating_prod(struct gk20a *g, bool prod) { diff --git a/drivers/gpu/nvgpu/common/clock_gating/gv11b_gating_reglist.h b/drivers/gpu/nvgpu/common/clock_gating/gv11b_gating_reglist.h index e1229dcf..ee4b6595 100644 --- a/drivers/gpu/nvgpu/common/clock_gating/gv11b_gating_reglist.h +++ b/drivers/gpu/nvgpu/common/clock_gating/gv11b_gating_reglist.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2019, NVIDIA Corporation. All rights reserved. + * Copyright (c) 2016-2020, NVIDIA Corporation. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -72,6 +72,9 @@ void gv11b_slcg_xbar_load_gating_prod(struct gk20a *g, void gv11b_slcg_hshub_load_gating_prod(struct gk20a *g, bool prod); +void gv11b_slcg_acb_load_gating_prod(struct gk20a *g, + bool prod); + void gv11b_blcg_bus_load_gating_prod(struct gk20a *g, bool prod); diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c index 347658b2..c3068b76 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gk20a.c @@ -1,7 +1,7 @@ /* * GK20A Graphics * - * Copyright (c) 2011-2019, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2011-2020, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -145,6 +145,10 @@ int gk20a_finalize_poweron(struct gk20a *g) g->gpu_reset_done = true; } + if (g->ops.clock_gating.slcg_acb_load_gating_prod != NULL) { + g->ops.clock_gating.slcg_acb_load_gating_prod(g, true); + } + /* * Do this early so any early VMs that get made are capable of mapping * buffers. diff --git a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c index c0f7e4e3..994e1024 100644 --- a/drivers/gpu/nvgpu/gv11b/hal_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/hal_gv11b.c @@ -533,6 +533,8 @@ static const struct gpu_ops gv11b_ops = { gv11b_slcg_xbar_load_gating_prod, .slcg_hshub_load_gating_prod = gv11b_slcg_hshub_load_gating_prod, + .slcg_acb_load_gating_prod = + gv11b_slcg_acb_load_gating_prod, .blcg_bus_load_gating_prod = gv11b_blcg_bus_load_gating_prod, .blcg_ce_load_gating_prod = diff --git a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h index 9ec4ab6b..aa95969d 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h +++ b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h @@ -623,6 +623,7 @@ struct gpu_ops { void (*slcg_therm_load_gating_prod)(struct gk20a *g, bool prod); void (*slcg_xbar_load_gating_prod)(struct gk20a *g, bool prod); void (*slcg_hshub_load_gating_prod)(struct gk20a *g, bool prod); + void (*slcg_acb_load_gating_prod)(struct gk20a *g, bool prod); void (*blcg_bus_load_gating_prod)(struct gk20a *g, bool prod); void (*blcg_ce_load_gating_prod)(struct gk20a *g, bool prod); void (*blcg_ctxsw_firmware_load_gating_prod)(struct gk20a *g, bool prod); -- cgit v1.2.2