From 7e59e0b09b605c4082fb812fb0842537819282cf Mon Sep 17 00:00:00 2001 From: Seema Khowala Date: Mon, 23 Oct 2017 13:27:28 -0700 Subject: gpu: nvgpu: save act_eng_bitmask in runlist_info Issue Currently bitmask of engine indices is being saved. This will give wrong active engine ids for a given runlist and s/w will end up checking/polling wrong engine_status registers as these registers are indexed by active engine ids. Also reset_eng_bitmask will end up having wrong value for active engine ids to be reset. Details for runlists serving engines ids for gv11b are:- runlist id 0: gr = 0, grcopy 0 = 2, grcopy1 = 3 runlist id 1: async ce = 1 Incorrect values init_runlist:705 [DBG] runlist 0 : eng bitmask 7 (eng 0, 1, 2) init_runlist:705 [DBG] runlist 1 : eng bitmask 8 (eng 3) Fix Save bitmask of active engine ids in runlist info. Right value init_runlist:705 [DBG] runlist 0 : eng bitmask d (eng 0, 2, 3) init_runlist:705 [DBG] runlist 1 : eng bitmask 2 (eng 1) Bug 200277163 Bug 1945121 Change-Id: Ia299aa0881c4a258080bb0daa3a542fef0d94e4f Signed-off-by: Seema Khowala Reviewed-on: https://git-master.nvidia.com/r/1584066 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'drivers/gpu') diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index 5d04aa0c..f3ed2efb 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c @@ -662,7 +662,7 @@ static int init_runlist(struct gk20a *g, struct fifo_gk20a *f) u32 active_engine_id, pbdma_id, engine_id; struct fifo_engine_info_gk20a *engine_info; - gk20a_dbg_fn(""); + nvgpu_log_fn(g, " "); f->max_runlists = g->ops.fifo.eng_runlist_base_size(); f->runlist_info = nvgpu_kzalloc(g, @@ -690,8 +690,9 @@ static int init_runlist(struct gk20a *g, struct fifo_gk20a *f) goto clean_up_runlist; runlist_size = f->runlist_entry_size * f->num_runlist_entries; - gk20a_dbg_info("runlist_entries %d runlist size %zu\n", - f->num_runlist_entries, runlist_size); + nvgpu_log(g, gpu_dbg_info, + "runlist_entries %d runlist size %zu", + f->num_runlist_entries, runlist_size); for (i = 0; i < MAX_RUNLIST_BUFFERS; i++) { int err = nvgpu_dma_alloc_sys(g, runlist_size, @@ -711,7 +712,7 @@ static int init_runlist(struct gk20a *g, struct fifo_gk20a *f) if (f->pbdma_map[pbdma_id] & BIT(runlist_id)) runlist->pbdma_bitmask |= BIT(pbdma_id); } - gk20a_dbg_info("runlist %d : pbdma bitmask %x", + nvgpu_log(g, gpu_dbg_info, "runlist %d : pbdma bitmask 0x%x", runlist_id, runlist->pbdma_bitmask); for (engine_id = 0; engine_id < f->num_engines; ++engine_id) { @@ -719,14 +720,13 @@ static int init_runlist(struct gk20a *g, struct fifo_gk20a *f) engine_info = &f->engine_info[active_engine_id]; if (engine_info && engine_info->runlist_id == runlist_id) - runlist->eng_bitmask |= BIT(engine_id); + runlist->eng_bitmask |= BIT(active_engine_id); } - gk20a_dbg_info("runlist %d : eng bitmask %x", + nvgpu_log(g, gpu_dbg_info, "runlist %d : act eng bitmask 0x%x", runlist_id, runlist->eng_bitmask); } - - gk20a_dbg_fn("done"); + nvgpu_log_fn(g, "done"); return 0; clean_up_runlist: -- cgit v1.2.2