From 72ae2dedf56e8d8f252497e7cadc80dd9c90ff81 Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Thu, 19 May 2016 09:28:30 -0700 Subject: gpu: nvgpu: Add HAL op for PMU reset Sequence to reset PMU is different for iGPU and dGPU. Specialize and implement iGPU version. Change-Id: I5b9ff2c018a736bc9e27b90d0942c52706b12a12 Signed-off-by: Terje Bergstrom Reviewed-on: http://git-master/r/1150540 --- drivers/gpu/nvgpu/gk20a/gk20a.h | 1 + drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | 8 ++++++++ drivers/gpu/nvgpu/gk20a/pmu_gk20a.h | 1 + drivers/gpu/nvgpu/gm20b/pmu_gm20b.c | 1 + 4 files changed, 11 insertions(+) (limited to 'drivers/gpu') diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 275619c9..87cf2459 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h @@ -533,6 +533,7 @@ struct gpu_ops { int (*send_lrf_tex_ltc_dram_overide_en_dis_cmd) (struct gk20a *g, u32 mask); void (*dump_secure_fuses)(struct gk20a *g); + int (*reset)(struct gk20a *g); u32 lspmuwprinitdone; u32 lsfloadedfalconid; bool fecsbootstrapdone; diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c index 54b2eef4..8bf382fd 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c @@ -2757,6 +2757,13 @@ static void gk20a_write_dmatrfbase(struct gk20a *g, u32 addr) gk20a_writel(g, pwr_falcon_dmatrfbase_r(), addr); } +int gk20a_pmu_reset(struct gk20a *g) +{ + gk20a_reset(g, mc_enable_pwr_enabled_f()); + + return 0; +} + void gk20a_init_pmu_ops(struct gpu_ops *gops) { gops->pmu.prepare_ucode = gk20a_prepare_ucode; @@ -2770,6 +2777,7 @@ void gk20a_init_pmu_ops(struct gpu_ops *gops) gops->pmu.pmu_pg_grinit_param = NULL; gops->pmu.send_lrf_tex_ltc_dram_overide_en_dis_cmd = NULL; gops->pmu.dump_secure_fuses = NULL; + gops->pmu.reset = gk20a_pmu_reset; } int gk20a_init_pmu_support(struct gk20a *g) diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h index efe03f13..b8bb18a2 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h @@ -1426,5 +1426,6 @@ void pmu_handle_fecs_boot_acr_msg(struct gk20a *g, struct pmu_msg *msg, void *param, u32 handle, u32 status); void gk20a_pmu_elpg_statistics(struct gk20a *g, u32 *ingating_time, u32 *ungating_time, u32 *gating_cnt); +int gk20a_pmu_reset(struct gk20a *g); #endif /*__PMU_GK20A_H__*/ diff --git a/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c b/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c index 34d1c30c..8eb600ef 100644 --- a/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c @@ -323,4 +323,5 @@ void gm20b_init_pmu_ops(struct gpu_ops *gops) gops->pmu.pmu_pg_grinit_param = NULL; gops->pmu.send_lrf_tex_ltc_dram_overide_en_dis_cmd = NULL; gops->pmu.dump_secure_fuses = pmu_dump_security_fuses_gm20b; + gops->pmu.reset = gk20a_pmu_reset; } -- cgit v1.2.2