From 71cd4a486f54eee67972a81f59c4185f828102e5 Mon Sep 17 00:00:00 2001 From: Seema Khowala Date: Mon, 17 Jul 2017 13:39:37 -0700 Subject: gpu: nvgpu: add esc read for PPC_COUNT Add esc read for GRCTX_REG_LIST_PPC_COUNT else gr_gk20a_determine_ppc_configuration function would return -EINVAL if num_pes_per_gpc i.e. GPU_LIT_NUM_PES_PER_GPC is > 1 JIRA GPUT19X-49 Bug 200311674 Change-Id: Iee7ee9ba14fcc7dca07c4c1dc20f8e7d018ed820 Signed-off-by: Seema Khowala Reviewed-on: https://git-master.nvidia.com/r/1522443 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Tested-by: Tushar Kashalikar Reviewed-by: Vijayakumar Subbu --- drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a_sim.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/gpu') diff --git a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a_sim.c b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a_sim.c index 36071223..58e62d32 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a_sim.c +++ b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a_sim.c @@ -72,6 +72,8 @@ int gr_gk20a_init_ctx_vars_sim(struct gk20a *g, struct gr_gk20a *gr) &g->gr.ctx_vars.ctxsw_regs.pm_gpc.count); gk20a_sim_esc_readl(g, "GRCTX_REG_LIST_PM_TPC_COUNT", 0, &g->gr.ctx_vars.ctxsw_regs.pm_tpc.count); + gk20a_sim_esc_readl(g, "GRCTX_REG_LIST_PPC_COUNT", 0, + &g->gr.ctx_vars.ctxsw_regs.ppc.count); gk20a_sim_esc_readl(g, "GRCTX_REG_LIST_ETPC_COUNT", 0, &g->gr.ctx_vars.ctxsw_regs.etpc.count); -- cgit v1.2.2