From 607b8649768ff32ce435cbf5726c9d185a68cd85 Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Mon, 23 Feb 2015 15:20:36 -0800 Subject: gpu: nvgpu: Implement syncpt protection Change-Id: I05b2554588e5e1001cdbb54551cf8a064ea531bd Signed-off-by: Terje Bergstrom Reviewed-on: http://git-master/r/711303 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Seshendra Gadagottu Reviewed-by: Deepak Nibade --- drivers/gpu/nvgpu/gp10b/fifo_gp10b.c | 27 ++++++++++++++++++++++++++- drivers/gpu/nvgpu/gp10b/hw_pbdma_gp10b.h | 26 +++++++++++++++++++++++++- drivers/gpu/nvgpu/gp10b/hw_ram_gp10b.h | 4 ++++ 3 files changed, 55 insertions(+), 2 deletions(-) (limited to 'drivers/gpu') diff --git a/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c b/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c index 59f7deef..08f1c13c 100644 --- a/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c +++ b/drivers/gpu/nvgpu/gp10b/fifo_gp10b.c @@ -147,10 +147,35 @@ static u32 gp10b_fifo_get_pbdma_signature(struct gk20a *g) | pbdma_signature_sw_zero_f(); } +static int gp10b_fifo_resetup_ramfc(struct channel_gk20a *c) +{ + int syncpt_id; + void *inst_ptr; + + gk20a_dbg_fn(""); + + inst_ptr = c->inst_block.cpu_va; + if (c->sync) { + u32 v = pbdma_allowed_syncpoints_0_valid_f(1); + + syncpt_id = c->sync->syncpt_id(c->sync); + gk20a_dbg_info("Channel %d, syncpt id %d\n", + c->hw_chid, syncpt_id); + + v |= pbdma_allowed_syncpoints_0_index_f(syncpt_id); + + gk20a_mem_wr32(inst_ptr, ram_fc_allowed_syncpoints_w(), v); + } + + gk20a_dbg_fn("done"); + + return 0; +} + void gp10b_init_fifo(struct gpu_ops *gops) { gm20b_init_fifo(gops); gops->fifo.setup_ramfc = channel_gp10b_setup_ramfc; gops->fifo.get_pbdma_signature = gp10b_fifo_get_pbdma_signature; - + gops->fifo.resetup_ramfc = gp10b_fifo_resetup_ramfc; } diff --git a/drivers/gpu/nvgpu/gp10b/hw_pbdma_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_pbdma_gp10b.h index 91429b47..18db8595 100644 --- a/drivers/gpu/nvgpu/gp10b/hw_pbdma_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/hw_pbdma_gp10b.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -410,6 +410,10 @@ static inline u32 pbdma_intr_0_signature_pending_f(void) { return 0x80000000; } +static inline u32 pbdma_intr_0_syncpoint_illegal_pending_f(void) +{ + return 0x10000000; +} static inline u32 pbdma_intr_1_r(u32 i) { return 0x00040148 + i*8192; @@ -438,6 +442,26 @@ static inline u32 pbdma_udma_nop_r(void) { return 0x00000008; } +static inline u32 pbdma_allowed_syncpoints_r(u32 i) +{ + return 0x000400e8 + i*8192; +} +static inline u32 pbdma_allowed_syncpoints_0_valid_f(u32 v) +{ + return (v & 0x1) << 31; +} +static inline u32 pbdma_allowed_syncpoints_0_index_f(u32 v) +{ + return (v & 0x7fff) << 16; +} +static inline u32 pbdma_allowed_syncpoints_1_valid_f(u32 v) +{ + return (v & 0x1) << 15; +} +static inline u32 pbdma_allowed_syncpoints_1_index_f(u32 v) +{ + return (v & 0x7fff) << 0; +} static inline u32 pbdma_syncpointa_r(u32 i) { return 0x000400a4 + i*8192; diff --git a/drivers/gpu/nvgpu/gp10b/hw_ram_gp10b.h b/drivers/gpu/nvgpu/gp10b/hw_ram_gp10b.h index dea53f96..863b15b8 100644 --- a/drivers/gpu/nvgpu/gp10b/hw_ram_gp10b.h +++ b/drivers/gpu/nvgpu/gp10b/hw_ram_gp10b.h @@ -342,6 +342,10 @@ static inline u32 ram_fc_formats_w(void) { return 39; } +static inline u32 ram_fc_allowed_syncpoints_w(void) +{ + return 58; +} static inline u32 ram_fc_syncpointa_w(void) { return 41; -- cgit v1.2.2