From 57e8a2417b256921acb07e9b490941c8ec9e0479 Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Thu, 13 Sep 2018 14:31:54 -0700 Subject: gpu: nvgpu: Do not disable GRFIFO access when resetting GR gk20a_init_gr_prepare() is called only when initializing GR from reset. In those cases there is no need to disable GRFIFO access. Remove the corresponding code. It also gets rid of one extra dependency to MC registers. JIRA NVGPU-954 Change-Id: I935e65f236e0f29ab224787d20e017d8c67e69e2 Signed-off-by: Terje Bergstrom Reviewed-on: https://git-master.nvidia.com/r/1822309 Reviewed-by: svc-misra-checker Reviewed-by: Seema Khowala GVS: Gerrit_Virtual_Submit Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 9 --------- 1 file changed, 9 deletions(-) (limited to 'drivers/gpu') diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 4a460d02..6c885b59 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c @@ -4705,17 +4705,8 @@ static void gr_gk20a_load_gating_prod(struct gk20a *g) static int gk20a_init_gr_prepare(struct gk20a *g) { - u32 gpfifo_ctrl, pmc_en; u32 err = 0; - /* disable fifo access */ - pmc_en = gk20a_readl(g, mc_enable_r()); - if (pmc_en & mc_enable_pgraph_enabled_f()) { - gpfifo_ctrl = gk20a_readl(g, gr_gpfifo_ctl_r()); - gpfifo_ctrl &= ~gr_gpfifo_ctl_access_enabled_f(); - gk20a_writel(g, gr_gpfifo_ctl_r(), gpfifo_ctrl); - } - /* reset gr engine */ g->ops.mc.reset(g, mc_enable_pgraph_enabled_f() | mc_enable_blg_enabled_f() | -- cgit v1.2.2