From 539c8bff4b501a4ca999290454a210f5d17ba516 Mon Sep 17 00:00:00 2001 From: Thomas Fleury Date: Thu, 19 Oct 2017 10:16:39 -0700 Subject: gpu: nvgpu: use full system barrier in BAR1 test BAR1 test could occasionally fail when doing CPU write through userd then reading back through BAR1. This is because nvgpu_smp_mb() only guarantees ordering between cores. Replaced with nvgpu_mb() to ensure the write will be visible to all bus masters in the system. JIRA EVLR-1959 Bug 200352099 Change-Id: Id002e73d135e0805fca2f153a6de77e210a7b226 Signed-off-by: Thomas Fleury Reviewed-on: https://git-master.nvidia.com/r/1582928 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 2 +- drivers/gpu/nvgpu/vgpu/fifo_vgpu.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/gpu') diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index fc71c358..3b7dce32 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c @@ -987,7 +987,7 @@ int gk20a_init_fifo_setup_hw(struct gk20a *g) v = gk20a_bar1_readl(g, bar1_vaddr); *cpu_vaddr = v1; - nvgpu_smp_mb(); + nvgpu_mb(); if (v1 != gk20a_bar1_readl(g, bar1_vaddr)) { nvgpu_err(g, "bar1 broken @ gk20a: CPU wrote 0x%x, \ diff --git a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c index eac720ca..2874e256 100644 --- a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c @@ -397,7 +397,7 @@ int vgpu_init_fifo_setup_hw(struct gk20a *g) v = gk20a_bar1_readl(g, bar1_vaddr); *cpu_vaddr = v1; - nvgpu_smp_mb(); + nvgpu_mb(); if (v1 != gk20a_bar1_readl(g, bar1_vaddr)) { nvgpu_err(g, "bar1 broken @ gk20a!"); -- cgit v1.2.2