From 18643ac1357a845d204d6dabd98359a0ab0509a7 Mon Sep 17 00:00:00 2001 From: Debarshi Dutta Date: Fri, 30 Nov 2018 10:57:05 +0530 Subject: gpu: nvgpu: replace input param chid with pointer to channel preempt_channel needs to use the channel to pass it to other public functions, get access to a tsg etc. This qualifies it to take a pointer to a channel as an input parameter instead of a chid. Increment the channel ref counter using the function gk20a_channel_from_id in functions where we get the chid from the h/w registers directly. Once the prempt_channel function call is done, use a gk20a_channel_put on the referenced channel. Jira NVGPU-1461 Change-Id: I6c87c8104cfcb418d468c8c590087fd4aeabf4bd Signed-off-by: Debarshi Dutta Reviewed-on: https://git-master.nvidia.com/r/1963200 (cherry picked from commit 9abe9fe062367902ede7721cff55396859f8e4e8 in dev-kernel) Reviewed-on: https://git-master.nvidia.com/r/2013728 Reviewed-by: svc-mobile-coverity GVS: Gerrit_Virtual_Submit Reviewed-by: Bibek Basu Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/common/fifo/channel.c | 4 +-- drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 50 +++++++++++++++++---------------- drivers/gpu/nvgpu/gk20a/fifo_gk20a.h | 4 +-- drivers/gpu/nvgpu/gv11b/fifo_gv11b.c | 11 ++------ drivers/gpu/nvgpu/gv11b/fifo_gv11b.h | 2 +- drivers/gpu/nvgpu/include/nvgpu/gk20a.h | 2 +- drivers/gpu/nvgpu/vgpu/fifo_vgpu.c | 6 ++-- drivers/gpu/nvgpu/vgpu/fifo_vgpu.h | 2 +- 8 files changed, 38 insertions(+), 43 deletions(-) (limited to 'drivers/gpu') diff --git a/drivers/gpu/nvgpu/common/fifo/channel.c b/drivers/gpu/nvgpu/common/fifo/channel.c index 6ac8e508..29720886 100644 --- a/drivers/gpu/nvgpu/common/fifo/channel.c +++ b/drivers/gpu/nvgpu/common/fifo/channel.c @@ -227,8 +227,8 @@ void gk20a_channel_abort(struct channel_gk20a *ch, bool channel_preempt) ch->g->ops.fifo.disable_channel(ch); - if (channel_preempt && gk20a_is_channel_marked_as_tsg(ch)) { - ch->g->ops.fifo.preempt_channel(ch->g, ch->chid); + if (channel_preempt) { + ch->g->ops.fifo.preempt_channel(ch->g, ch); } if (ch->g->ops.fifo.ch_abort_clean_up) { diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index 382744c7..06db0bb0 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c @@ -2912,19 +2912,14 @@ void gk20a_fifo_preempt_timeout_rc_tsg(struct gk20a *g, struct tsg_gk20a *tsg) gk20a_fifo_recover_tsg(g, tsg, true, RC_TYPE_PREEMPT_TIMEOUT); } -void gk20a_fifo_preempt_timeout_rc(struct gk20a *g, u32 chid) +void gk20a_fifo_preempt_timeout_rc(struct gk20a *g, struct channel_gk20a *ch) { - struct channel_gk20a *ch = gk20a_channel_from_id(g, chid); + nvgpu_err(g, "preempt channel %d timeout", ch->chid); - nvgpu_err(g, "preempt channel %d timeout", chid); - - if (ch != NULL) { - g->ops.fifo.set_error_notifier(ch, + g->ops.fifo.set_error_notifier(ch, NVGPU_ERR_NOTIFIER_FIFO_ERROR_IDLE_TIMEOUT); - gk20a_fifo_recover_ch(g, ch, true, + gk20a_fifo_recover_ch(g, ch, true, RC_TYPE_PREEMPT_TIMEOUT); - gk20a_channel_put(ch); - } } int __locked_fifo_preempt(struct gk20a *g, u32 id, bool is_tsg) @@ -2945,7 +2940,7 @@ int __locked_fifo_preempt(struct gk20a *g, u32 id, bool is_tsg) return ret; } -int gk20a_fifo_preempt_channel(struct gk20a *g, u32 chid) +int gk20a_fifo_preempt_channel(struct gk20a *g, struct channel_gk20a *ch) { struct fifo_gk20a *f = &g->fifo; u32 ret = 0; @@ -2953,10 +2948,7 @@ int gk20a_fifo_preempt_channel(struct gk20a *g, u32 chid) u32 mutex_ret = 0; u32 i; - nvgpu_log_fn(g, "chid: %d", chid); - if (chid == FIFO_INVAL_CHANNEL_ID) { - return 0; - } + nvgpu_log_fn(g, "chid: %d", ch->chid); /* we have no idea which runlist we are using. lock all */ for (i = 0; i < g->fifo.max_runlists; i++) { @@ -2965,7 +2957,7 @@ int gk20a_fifo_preempt_channel(struct gk20a *g, u32 chid) mutex_ret = nvgpu_pmu_mutex_acquire(&g->pmu, PMU_MUTEX_ID_FIFO, &token); - ret = __locked_fifo_preempt(g, chid, false); + ret = __locked_fifo_preempt(g, ch->chid, false); if (!mutex_ret) { nvgpu_pmu_mutex_release(&g->pmu, PMU_MUTEX_ID_FIFO, &token); @@ -2978,9 +2970,10 @@ int gk20a_fifo_preempt_channel(struct gk20a *g, u32 chid) if (ret) { if (nvgpu_platform_is_silicon(g)) { nvgpu_err(g, "preempt timed out for chid: %u, " - "ctxsw timeout will trigger recovery if needed", chid); + "ctxsw timeout will trigger recovery if needed", + ch->chid); } else { - gk20a_fifo_preempt_timeout_rc(g, chid); + gk20a_fifo_preempt_timeout_rc(g, ch); } } @@ -3035,7 +3028,7 @@ int gk20a_fifo_preempt(struct gk20a *g, struct channel_gk20a *ch) if (tsg != NULL) { err = g->ops.fifo.preempt_tsg(ch->g, tsg); } else { - err = g->ops.fifo.preempt_channel(ch->g, ch->chid); + err = g->ops.fifo.preempt_channel(ch->g, ch); } return err; @@ -3126,8 +3119,9 @@ int gk20a_fifo_disable_engine_activity(struct gk20a *g, u32 pbdma_chid = FIFO_INVAL_CHANNEL_ID; u32 engine_chid = FIFO_INVAL_CHANNEL_ID; u32 token = PMU_INVALID_MUTEX_OWNER_ID; - u32 mutex_ret; - u32 err = 0; + int mutex_ret; + struct channel_gk20a *ch = NULL; + int err = 0; nvgpu_log_fn(g, " "); @@ -3155,8 +3149,12 @@ int gk20a_fifo_disable_engine_activity(struct gk20a *g, } if (pbdma_chid != FIFO_INVAL_CHANNEL_ID) { - err = g->ops.fifo.preempt_channel(g, pbdma_chid); - if (err) { + ch = gk20a_channel_from_id(g, pbdma_chid); + if (ch != NULL) { + err = g->ops.fifo.preempt_channel(g, ch); + gk20a_channel_put(ch); + } + if (err != 0) { goto clean_up; } } @@ -3173,8 +3171,12 @@ int gk20a_fifo_disable_engine_activity(struct gk20a *g, } if (engine_chid != FIFO_INVAL_ENGINE_ID && engine_chid != pbdma_chid) { - err = g->ops.fifo.preempt_channel(g, engine_chid); - if (err) { + ch = gk20a_channel_from_id(g, engine_chid); + if (ch != NULL) { + err = g->ops.fifo.preempt_channel(g, ch); + gk20a_channel_put(ch); + } + if (err != 0) { goto clean_up; } } diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h index 330929f6..29c2f889 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h @@ -230,7 +230,7 @@ int gk20a_init_fifo_setup_hw(struct gk20a *g); void gk20a_fifo_isr(struct gk20a *g); u32 gk20a_fifo_nonstall_isr(struct gk20a *g); -int gk20a_fifo_preempt_channel(struct gk20a *g, u32 chid); +int gk20a_fifo_preempt_channel(struct gk20a *g, struct channel_gk20a *ch); int gk20a_fifo_preempt_tsg(struct gk20a *g, struct tsg_gk20a *tsg); int gk20a_fifo_preempt(struct gk20a *g, struct channel_gk20a *ch); @@ -391,7 +391,7 @@ int gk20a_fifo_is_preempt_pending(struct gk20a *g, u32 id, unsigned int id_type); int __locked_fifo_preempt(struct gk20a *g, u32 id, bool is_tsg); void gk20a_fifo_preempt_timeout_rc_tsg(struct gk20a *g, struct tsg_gk20a *tsg); -void gk20a_fifo_preempt_timeout_rc(struct gk20a *g, u32 chid); +void gk20a_fifo_preempt_timeout_rc(struct gk20a *g, struct channel_gk20a *ch); int gk20a_fifo_setup_ramfc(struct channel_gk20a *c, u64 gpfifo_base, u32 gpfifo_entries, unsigned long timeout, u32 flags); diff --git a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c index fb9c7712..8b5eef82 100644 --- a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c @@ -801,22 +801,17 @@ int gv11b_fifo_is_preempt_pending(struct gk20a *g, u32 id, return ret; } -int gv11b_fifo_preempt_channel(struct gk20a *g, u32 chid) +int gv11b_fifo_preempt_channel(struct gk20a *g, struct channel_gk20a *ch) { - struct fifo_gk20a *f = &g->fifo; struct tsg_gk20a *tsg = NULL; - if (chid == FIFO_INVAL_CHANNEL_ID) { - return 0; - } - - tsg = tsg_gk20a_from_ch(&f->channel[chid]); + tsg = tsg_gk20a_from_ch(ch); if (tsg == NULL) { return 0; } - nvgpu_log_info(g, "chid:%d tsgid:%d", chid, tsg->tsgid); + nvgpu_log_info(g, "chid:%d tsgid:%d", ch->chid, tsg->tsgid); /* Preempt tsg. Channel preempt is NOOP */ return g->ops.fifo.preempt_tsg(g, tsg); diff --git a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h index 7ff42637..3d491bad 100644 --- a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h +++ b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.h @@ -81,7 +81,7 @@ u32 gv11b_fifo_intr_0_error_mask(struct gk20a *g); int gv11b_fifo_reschedule_runlist(struct channel_gk20a *ch, bool preempt_next); int gv11b_fifo_is_preempt_pending(struct gk20a *g, u32 id, unsigned int id_type); -int gv11b_fifo_preempt_channel(struct gk20a *g, u32 chid); +int gv11b_fifo_preempt_channel(struct gk20a *g, struct channel_gk20a *ch); int gv11b_fifo_preempt_tsg(struct gk20a *g, struct tsg_gk20a *tsg); int gv11b_fifo_enable_tsg(struct tsg_gk20a *tsg); void gv11b_fifo_teardown_ch_tsg(struct gk20a *g, u32 act_eng_bitmask, diff --git a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h index f6aabd82..dfa4aaf2 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/gk20a.h +++ b/drivers/gpu/nvgpu/include/nvgpu/gk20a.h @@ -645,7 +645,7 @@ struct gpu_ops { unsigned long acquire_timeout, u32 flags); int (*resetup_ramfc)(struct channel_gk20a *c); - int (*preempt_channel)(struct gk20a *g, u32 chid); + int (*preempt_channel)(struct gk20a *g, struct channel_gk20a *ch); int (*preempt_tsg)(struct gk20a *g, struct tsg_gk20a *tsg); int (*enable_tsg)(struct tsg_gk20a *tsg); int (*disable_tsg)(struct tsg_gk20a *tsg); diff --git a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c index 9e3f7867..234f6fd4 100644 --- a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c +++ b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.c @@ -443,10 +443,8 @@ int vgpu_init_fifo_support(struct gk20a *g) return err; } -int vgpu_fifo_preempt_channel(struct gk20a *g, u32 chid) +int vgpu_fifo_preempt_channel(struct gk20a *g, struct channel_gk20a *ch) { - struct fifo_gk20a *f = &g->fifo; - struct channel_gk20a *ch = &f->channel[chid]; struct tegra_vgpu_cmd_msg msg; struct tegra_vgpu_channel_config_params *p = &msg.params.channel_config; @@ -464,7 +462,7 @@ int vgpu_fifo_preempt_channel(struct gk20a *g, u32 chid) if (err || msg.ret) { nvgpu_err(g, - "preempt channel %d failed", chid); + "preempt channel %d failed", ch->chid); err = -ENOMEM; } diff --git a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.h b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.h index 8c042033..db199f8f 100644 --- a/drivers/gpu/nvgpu/vgpu/fifo_vgpu.h +++ b/drivers/gpu/nvgpu/vgpu/fifo_vgpu.h @@ -41,7 +41,7 @@ int vgpu_channel_setup_ramfc(struct channel_gk20a *ch, u64 gpfifo_base, u32 gpfifo_entries, unsigned long acquire_timeout, u32 flags); int vgpu_fifo_init_engine_info(struct fifo_gk20a *f); -int vgpu_fifo_preempt_channel(struct gk20a *g, u32 chid); +int vgpu_fifo_preempt_channel(struct gk20a *g, struct channel_gk20a *ch); int vgpu_fifo_preempt_tsg(struct gk20a *g, struct tsg_gk20a *tsg); int vgpu_fifo_update_runlist(struct gk20a *g, u32 runlist_id, u32 chid, bool add, bool wait_for_finish); -- cgit v1.2.2