From 106dd9cd57e0147328fcd5ea0898f6ac0f9d3db7 Mon Sep 17 00:00:00 2001 From: Sami Kiminki Date: Tue, 3 Dec 2013 22:36:10 +0200 Subject: video: tegra: host: gk20a: GPU characteristics This adds new IOCTL that provides information for the userspace for GPU characterization. Specifically, the following items are provided: GPU arch/impl/rev, number of GPCs, L2 cache size, on-board video memory size, num of tpc:s per gpc, and bus type. The primary user of the new IOCTL will be rmapi_tegra. Bug 1392902 Change-Id: Ia7c25c83c8a07821ec60be3edd018c6e0894df0f Reviewed-on: http://git-master/r/346379 (cherry picked from commit 0b9ceca5a06d07cc8d281a92b76ebef8d4da0c92) Reviewed-on: http://git-master/r/350658 Reviewed-by: Sami Kiminki Reviewed-by: Terje Bergstrom Tested-by: Terje Bergstrom Signed-off-by: Sami Kiminki --- drivers/gpu/nvgpu/gk20a/gk20a.c | 71 ++++++++++++++++++++++++++++++++++++++++- 1 file changed, 70 insertions(+), 1 deletion(-) (limited to 'drivers/gpu') diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c index 19880da4..97649b19 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gk20a.c @@ -914,6 +914,12 @@ static int gk20a_pm_finalize_poweron(struct device *dev) goto done; } + err = gk20a_init_gpu_characteristics(g); + if (err) { + nvhost_err(&dev->dev, "failed to init gk20a gpu characteristics"); + goto done; + } + gk20a_channel_resume(g); set_user_nice(current, nice_value); @@ -1577,11 +1583,74 @@ void gk20a_reset(struct gk20a *g, u32 units) gk20a_enable(g, units); } +static u32 gk20a_determine_L2_size_bytes(struct gk20a *g) +{ + const u32 gpuid = GK20A_GPUID(g->gpu_characteristics.arch, + g->gpu_characteristics.impl); + u32 lts_per_ltc; + u32 ways; + u32 sets; + u32 bytes_per_line; + u32 active_ltcs; + u32 cache_size; + + u32 tmp; + u32 active_sets_value; + + tmp = gk20a_readl(g, ltc_ltc0_lts0_tstg_cfg1_r()); + ways = hweight32(ltc_ltc0_lts0_tstg_cfg1_active_ways_v(tmp)); + + active_sets_value = ltc_ltc0_lts0_tstg_cfg1_active_sets_v(tmp); + if (active_sets_value == ltc_ltc0_lts0_tstg_cfg1_active_sets_all_v()) { + sets = 64; + } else if (active_sets_value == + ltc_ltc0_lts0_tstg_cfg1_active_sets_half_v()) { + sets = 32; + } else if (active_sets_value == + ltc_ltc0_lts0_tstg_cfg1_active_sets_quarter_v()) { + sets = 16; + } else { + dev_err(dev_from_gk20a(g), + "Unknown constant %u for active sets", + (unsigned)active_sets_value); + sets = 0; + } + + active_ltcs = g->gr.num_fbps; + + /* chip-specific values */ + switch (gpuid) { + case GK20A_GPUID_GK20A: + lts_per_ltc = 1; + bytes_per_line = 128; + break; + + default: + dev_err(dev_from_gk20a(g), "Unknown GPU id 0x%02x\n", + (unsigned)gpuid); + lts_per_ltc = 0; + bytes_per_line = 0; + } + + cache_size = active_ltcs * lts_per_ltc * ways * sets * bytes_per_line; + + return cache_size; +} + int gk20a_init_gpu_characteristics(struct gk20a *g) { struct nvhost_gpu_characteristics *gpu = &g->gpu_characteristics; - gpu->L2_cache_size = g->ops.ltc.determine_L2_size_bytes(g); + u32 mc_boot_0_value; + mc_boot_0_value = gk20a_readl(g, mc_boot_0_r()); + gpu->arch = mc_boot_0_architecture_v(mc_boot_0_value) << + NVHOST_GPU_ARCHITECTURE_SHIFT; + gpu->impl = mc_boot_0_implementation_v(mc_boot_0_value); + gpu->rev = + (mc_boot_0_major_revision_v(mc_boot_0_value) << 4) | + mc_boot_0_minor_revision_v(mc_boot_0_value); + + gpu->L2_cache_size = gk20a_determine_L2_size_bytes(g); gpu->on_board_video_memory_size = 0; /* integrated GPU */ gpu->num_gpc = g->gr.gpc_count; -- cgit v1.2.2