From f8402eb90a68ab1e38ef87166458dc064501a8f9 Mon Sep 17 00:00:00 2001 From: seshendra Gadagottu Date: Tue, 5 Dec 2017 16:14:37 -0800 Subject: gpu: nvgpu: gv1xx: remove scg_type from channel info scg_type for graphics_compute0 and compute1 is deprecated for gv1xx. Remove it from setting in the channel info. Bug 1842197 Change-Id: I37354adcd82bb0ab648e0f04d47de796b79f91cd Signed-off-by: seshendra Gadagottu Reviewed-on: https://git-master.nvidia.com/r/1640440 Reviewed-by: mobile promotions Tested-by: mobile promotions --- drivers/gpu/nvgpu/gv11b/fifo_gv11b.c | 10 ++-------- drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_pbdma_gv100.h | 8 -------- drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pbdma_gv11b.h | 8 -------- 3 files changed, 2 insertions(+), 24 deletions(-) (limited to 'drivers/gpu/nvgpu') diff --git a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c index a7a58e2f..7d3c5c75 100644 --- a/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c +++ b/drivers/gpu/nvgpu/gv11b/fifo_gv11b.c @@ -1,7 +1,7 @@ /* * GV11B fifo * - * Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2015-2018, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -184,13 +184,7 @@ int channel_gv11b_setup_ramfc(struct channel_gk20a *c, nvgpu_mem_wr32(g, mem, ram_fc_chid_w(), ram_fc_chid_id_f(c->chid)); - if (c->t19x.subctx_id == CHANNEL_INFO_VEID0) - nvgpu_mem_wr32(g, mem, ram_fc_set_channel_info_w(), - pbdma_set_channel_info_scg_type_graphics_compute0_f() | - pbdma_set_channel_info_veid_f(c->t19x.subctx_id)); - else - nvgpu_mem_wr32(g, mem, ram_fc_set_channel_info_w(), - pbdma_set_channel_info_scg_type_compute1_f() | + nvgpu_mem_wr32(g, mem, ram_fc_set_channel_info_w(), pbdma_set_channel_info_veid_f(c->t19x.subctx_id)); gv11b_fifo_init_ramfc_eng_method_buffer(g, c, mem); diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_pbdma_gv100.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_pbdma_gv100.h index 66a0737c..4b7eb25c 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_pbdma_gv100.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_pbdma_gv100.h @@ -628,14 +628,6 @@ static inline u32 pbdma_set_channel_info_r(u32 i) { return 0x000400fcU + i*8192U; } -static inline u32 pbdma_set_channel_info_scg_type_graphics_compute0_f(void) -{ - return 0x0U; -} -static inline u32 pbdma_set_channel_info_scg_type_compute1_f(void) -{ - return 0x1U; -} static inline u32 pbdma_set_channel_info_veid_f(u32 v) { return (v & 0x3fU) << 8U; diff --git a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pbdma_gv11b.h b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pbdma_gv11b.h index 9b9017ee..f05bee84 100644 --- a/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pbdma_gv11b.h +++ b/drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pbdma_gv11b.h @@ -628,14 +628,6 @@ static inline u32 pbdma_set_channel_info_r(u32 i) { return 0x000400fcU + i*8192U; } -static inline u32 pbdma_set_channel_info_scg_type_graphics_compute0_f(void) -{ - return 0x0U; -} -static inline u32 pbdma_set_channel_info_scg_type_compute1_f(void) -{ - return 0x1U; -} static inline u32 pbdma_set_channel_info_veid_f(u32 v) { return (v & 0x3fU) << 8U; -- cgit v1.2.2