From e233b0fdcdf19ed6356a31fed04654f2ee103d98 Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Sat, 19 Sep 2015 19:03:45 -0700 Subject: gpu: nvgpu: Commit cb manager at context create Call commit_cb_manager() at context creation time instead of hardware initialization. This allows per-channel sizes for buffers. Bug 1686189 Change-Id: Ie4d08e87f237bc63bac0268128f59d4fe8536c95 Signed-off-by: Terje Bergstrom Reviewed-on: http://git-master/r/801777 Reviewed-on: http://git-master/r/806181 --- drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 15 ++------------- drivers/gpu/nvgpu/gm20b/gr_gm20b.c | 13 +------------ 2 files changed, 3 insertions(+), 25 deletions(-) (limited to 'drivers/gpu/nvgpu') diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 18f00c63..19d9cffc 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c @@ -767,7 +767,7 @@ static int gr_gk20a_commit_global_cb_manager(struct gk20a *g, struct channel_gk20a *c, bool patch) { struct gr_gk20a *gr = &g->gr; - struct channel_ctx_gk20a *ch_ctx = NULL; + struct channel_ctx_gk20a *ch_ctx = &c->ch_ctx; u32 attrib_offset_in_chunk = 0; u32 alpha_offset_in_chunk = 0; u32 pd_ab_max_output; @@ -777,14 +777,6 @@ static int gr_gk20a_commit_global_cb_manager(struct gk20a *g, gk20a_dbg_fn(""); - if (patch) { - int err; - ch_ctx = &c->ch_ctx; - err = gr_gk20a_ctx_patch_write_begin(g, ch_ctx); - if (err) - return err; - } - gr_gk20a_ctx_patch_write(g, ch_ctx, gr_ds_tga_constraintlogic_r(), gr_ds_tga_constraintlogic_beta_cbsize_f(gr->attrib_cb_default_size) | gr_ds_tga_constraintlogic_alpha_cbsize_f(gr->alpha_cb_default_size), @@ -831,9 +823,6 @@ static int gr_gk20a_commit_global_cb_manager(struct gk20a *g, } } - if (patch) - gr_gk20a_ctx_patch_write_end(g, ch_ctx); - return 0; } @@ -891,6 +880,7 @@ static int gr_gk20a_commit_global_ctx_buffers(struct gk20a *g, gk20a_dbg_info("attrib cb addr : 0x%016llx", addr); g->ops.gr.commit_global_attrib_cb(g, ch_ctx, addr, patch); + g->ops.gr.commit_global_cb_manager(g, c, patch); if (patch) gr_gk20a_ctx_patch_write_end(g, ch_ctx); @@ -4184,7 +4174,6 @@ static int gk20a_init_gr_setup_hw(struct gk20a *g) gr_fe_go_idle_timeout_count_disabled_f()); /* override a few ctx state registers */ - g->ops.gr.commit_global_cb_manager(g, NULL, false); gr_gk20a_commit_global_timeslice(g, NULL, false); /* floorsweep anything left */ diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c index df7f2af9..b8533f46 100644 --- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c @@ -170,7 +170,7 @@ static int gr_gm20b_commit_global_cb_manager(struct gk20a *g, struct channel_gk20a *c, bool patch) { struct gr_gk20a *gr = &g->gr; - struct channel_ctx_gk20a *ch_ctx = NULL; + struct channel_ctx_gk20a *ch_ctx = &c->ch_ctx; u32 attrib_offset_in_chunk = 0; u32 alpha_offset_in_chunk = 0; u32 pd_ab_max_output; @@ -180,14 +180,6 @@ static int gr_gm20b_commit_global_cb_manager(struct gk20a *g, gk20a_dbg_fn(""); - if (patch) { - int err; - ch_ctx = &c->ch_ctx; - err = gr_gk20a_ctx_patch_write_begin(g, ch_ctx); - if (err) - return err; - } - gr_gk20a_ctx_patch_write(g, ch_ctx, gr_ds_tga_constraintlogic_r(), gr_ds_tga_constraintlogic_beta_cbsize_f(gr->attrib_cb_default_size) | gr_ds_tga_constraintlogic_alpha_cbsize_f(gr->alpha_cb_default_size), @@ -247,9 +239,6 @@ static int gr_gm20b_commit_global_cb_manager(struct gk20a *g, } } - if (patch) - gr_gk20a_ctx_patch_write_end(g, ch_ctx); - return 0; } -- cgit v1.2.2