From cc4208a27831faf95409b491aa29b8a161bf630a Mon Sep 17 00:00:00 2001 From: Shardar Shariff Md Date: Tue, 1 Nov 2016 19:06:06 +0530 Subject: gpu: nvgpu: define fuse macro depend on kernel version - Define fuse macros depending on kernel version as fuse offset got changed in K4.4 and for K4.4 fuse defines are defined in common header file (tegra-fuse.h) - Use fuse control read/write APIs when reading control registers for K4.4. Bug 200243956 Change-Id: I5a86ef58d9de17a273aea8d3ce8ad5772444dac2 Signed-off-by: Shardar Shariff Md Reviewed-on: http://git-master/r/1245824 Reviewed-by: Deepak Nibade Reviewed-by: Konsta Holtta Reviewed-by: Terje Bergstrom GVS: Gerrit_Virtual_Submit --- drivers/gpu/nvgpu/gk20a/pmu_gk20a.h | 3 +++ drivers/gpu/nvgpu/gm20b/gr_gm20b.c | 6 ++++++ drivers/gpu/nvgpu/gm20b/gr_gm20b.h | 5 +++++ drivers/gpu/nvgpu/gm20b/hal_gm20b.c | 4 ++++ 4 files changed, 18 insertions(+) (limited to 'drivers/gpu/nvgpu') diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h index 6ec0067b..2cb56639 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h @@ -21,6 +21,7 @@ #ifndef __PMU_GK20A_H__ #define __PMU_GK20A_H__ +#include #include "pmu_api.h" #include "pmu_common.h" #include "pmuif/gpmuifboardobj.h" @@ -55,7 +56,9 @@ #define APP_VERSION_0 16856675 /*Fuse defines*/ +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 4, 0) #define FUSE_GCPLEX_CONFIG_FUSE_0 0x2C8 +#endif #define PMU_MODE_MISMATCH_STATUS_MAILBOX_R 6 #define PMU_MODE_MISMATCH_STATUS_VAL 0xDEADDEAD diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c index 7903af79..23144275 100644 --- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c @@ -18,6 +18,7 @@ #include #include #include +#include #include @@ -513,8 +514,13 @@ static void gr_gm20b_set_gpc_tpc_mask(struct gk20a *g, u32 gpc_index) tegra_clk_writel(CLK_RST_CONTROLLER_MISC_CLK_ENB_0_ALL_VISIBLE, CLK_RST_CONTROLLER_MISC_CLK_ENB_0); +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 4, 0) tegra_fuse_writel(0x1, FUSE_FUSEBYPASS_0); tegra_fuse_writel(0x0, FUSE_WRITE_ACCESS_SW_0); +#else + tegra_fuse_control_write(0x1, FUSE_FUSEBYPASS_0); + tegra_fuse_control_write(0x0, FUSE_WRITE_ACCESS_SW_0); +#endif if (g->gr.gpc_tpc_mask[gpc_index] == 0x1) { tegra_fuse_writel(0x0, FUSE_OPT_GPU_TPC0_DISABLE_0); diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.h b/drivers/gpu/nvgpu/gm20b/gr_gm20b.h index fc52f223..fd24d105 100644 --- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.h +++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.h @@ -15,6 +15,9 @@ #ifndef _NVHOST_GM20B_GR_MMU_H #define _NVHOST_GM20B_GR_MMU_H + +#include + struct gk20a; enum { @@ -31,10 +34,12 @@ enum { #define CLK_RST_CONTROLLER_MISC_CLK_ENB_0 0x48 #define CLK_RST_CONTROLLER_MISC_CLK_ENB_0_ALL_VISIBLE BIT(28) +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 4, 0) #define FUSE_FUSEBYPASS_0 0x24 #define FUSE_WRITE_ACCESS_SW_0 0x30 #define FUSE_OPT_GPU_TPC0_DISABLE_0 0x30C #define FUSE_OPT_GPU_TPC1_DISABLE_0 0x33C +#endif #define NVB197_SET_ALPHA_CIRCULAR_BUFFER_SIZE 0x02dc #define NVB197_SET_CIRCULAR_BUFFER_SIZE 0x1280 diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c index 1c601894..966d33d7 100644 --- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c @@ -14,6 +14,7 @@ */ #include +#include #include "gk20a/gk20a.h" @@ -38,7 +39,10 @@ #include "gk20a/dbg_gpu_gk20a.h" #include "gk20a/css_gr_gk20a.h" +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 4, 0) #define FUSE_OPT_PRIV_SEC_DIS_0 0x264 +#endif + #define PRIV_SECURITY_DISABLE 0x01 static struct gpu_ops gm20b_ops = { -- cgit v1.2.2